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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/ARM/ARMGenInstrInfo.inc 5366 static const MCOperandInfo OperandInfo54[] = { { ARM::GPRPairRegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { ARM::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { ARM::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { ARM::GPRPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { ARM::GPRPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
5366 static const MCOperandInfo OperandInfo54[] = { { ARM::GPRPairRegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { ARM::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { ARM::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { ARM::GPRPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { ARM::GPRPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
5366 static const MCOperandInfo OperandInfo54[] = { { ARM::GPRPairRegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { ARM::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { ARM::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { ARM::GPRPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { ARM::GPRPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
5459 static const MCOperandInfo OperandInfo147[] = { { ARM::GPRPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { ARM::GPRRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0|(1<<MCOI::Predicate), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0|(1<<MCOI::Predicate), MCOI::OPERAND_UNKNOWN, 0 }, };
5579 static const MCOperandInfo OperandInfo267[] = { { ARM::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { ARM::GPRPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { ARM::GPRRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0|(1<<MCOI::Predicate), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0|(1<<MCOI::Predicate), MCOI::OPERAND_UNKNOWN, 0 }, };
gen/lib/Target/ARM/ARMGenRegisterInfo.inc 2930 { GPRPair, GPRPairBits, 2474, 7, sizeof(GPRPairBits), ARM::GPRPairRegClassID, 1, true },
7014 &ARMMCRegisterClasses[GPRPairRegClassID],
lib/Target/ARM/ARMBaseRegisterInfo.cpp 237 case ARM::GPRPairRegClassID:
lib/Target/ARM/ARMISelDAGToDAG.cpp 1692 CurDAG->getTargetConstant(ARM::GPRPairRegClassID, dl, MVT::i32);
4771 Flag = InlineAsm::getFlagWordForRegClass(Flag, ARM::GPRPairRegClassID);
lib/Target/ARM/ARMISelLowering.cpp 9061 DAG.getTargetConstant(ARM::GPRPairRegClassID, dl, MVT::i32);
lib/Target/ARM/AsmParser/ARMAsmParser.cpp 7118 Reg1, ARM::gsub_0, &(MRI->getRegClass(ARM::GPRPairRegClassID)));
lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp 272 Reg, ARM::gsub_0, &MRI.getRegClass(ARM::GPRPairRegClassID)));