|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/AMDGPU/AMDGPUGenGlobalISel.inc 2462 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AMDGPU::VReg_1024RegClassID,
2463 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AMDGPU::VReg_1024RegClassID,
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc15526 static const MCOperandInfo OperandInfo184[] = { { AMDGPU::VReg_1024RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
gen/lib/Target/AMDGPU/AMDGPUGenRegisterBank.inc 208 (1u << (AMDGPU::VReg_1024RegClassID - 64)) |
gen/lib/Target/AMDGPU/AMDGPUGenRegisterInfo.inc11336 { VReg_1024, VReg_1024Bits, 668, 225, sizeof(VReg_1024Bits), AMDGPU::VReg_1024RegClassID, 32, true },
21452 &AMDGPUMCRegisterClasses[VReg_1024RegClassID],
lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp 282 isRegClass(AMDGPU::VReg_1024RegClassID);
1905 case 32: return AMDGPU::VReg_1024RegClassID;
lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp 1120 case AMDGPU::VReg_1024RegClassID: