reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

Declarations

gen/lib/Target/AMDGPU/AMDGPUGenRegisterInfo.inc

17365   extern const TargetRegisterClass SGPR_128RegClass;

References

gen/lib/Target/AMDGPU/AMDGPUGenRegisterInfo.inc

19851   &AMDGPU::SGPR_128RegClass,
19857   &AMDGPU::SGPR_128RegClass,
19863   &AMDGPU::SGPR_128RegClass,
19874   &AMDGPU::SGPR_128RegClass,
19882   &AMDGPU::SGPR_128RegClass,
21750     &AMDGPU::SGPR_128RegClass,

lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.cpp

   87       &AMDGPU::SGPR_128RegClass);

lib/Target/AMDGPU/AMDGPUCallLowering.cpp

  394     MF.addLiveIn(PrivateSegmentBufferReg, &AMDGPU::SGPR_128RegClass);

lib/Target/AMDGPU/AMDGPUTargetMachine.cpp

 1052       !AMDGPU::SGPR_128RegClass.contains(MFI->ScratchRSrcReg)) {
 1101                              AMDGPU::SGPR_128RegClass,

lib/Target/AMDGPU/SIFrameLowering.cpp

   29   return makeArrayRef(AMDGPU::SGPR_128RegClass.begin(),

lib/Target/AMDGPU/SIISelLowering.cpp

  130   addRegisterClass(MVT::v2i64, &AMDGPU::SGPR_128RegClass);
  131   addRegisterClass(MVT::v2f64, &AMDGPU::SGPR_128RegClass);
  133   addRegisterClass(MVT::v4i32, &AMDGPU::SGPR_128RegClass);
 1770     MF.addLiveIn(PrivateSegmentBufferReg, &AMDGPU::SGPR_128RegClass);
10564         RC = &AMDGPU::SGPR_128RegClass;

lib/Target/AMDGPU/SIInstrInfo.cpp

 4347   Register SRsrc = MRI.createVirtualRegister(&AMDGPU::SGPR_128RegClass);
 4486   Register NewSRsrc = MRI.createVirtualRegister(&AMDGPU::SGPR_128RegClass);
 6266   return RI.getRegClass(RCID)->hasSubClassEq(&AMDGPU::SGPR_128RegClass);

lib/Target/AMDGPU/SILoadStoreOptimizer.cpp

 1275       return &AMDGPU::SGPR_128RegClass;

lib/Target/AMDGPU/SIMachineFunctionInfo.cpp

  192     getNextUserSGPR(), AMDGPU::sub0, &AMDGPU::SGPR_128RegClass));

lib/Target/AMDGPU/SIRegisterInfo.cpp

  113   return getMatchingSuperReg(BaseReg, AMDGPU::sub0, &AMDGPU::SGPR_128RegClass);
 1390     return &AMDGPU::SGPR_128RegClass;
 1420       return &AMDGPU::SGPR_128RegClass;
 1812                                                  &AMDGPU::SGPR_128RegClass;