reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
653 MCPhysReg HighestVGPRReg = AMDGPU::NoRegister; 662 MCPhysReg HighestAGPRReg = AMDGPU::NoRegister; 669 Info.NumAGPR = HighestAGPRReg == AMDGPU::NoRegister ? 0 : 673 MCPhysReg HighestSGPRReg = AMDGPU::NoRegister; 683 Info.NumVGPR = HighestVGPRReg == AMDGPU::NoRegister ? 0 : 685 Info.NumExplicitSGPR = HighestSGPRReg == AMDGPU::NoRegister ? 0 : 724 case AMDGPU::NoRegister:lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
787 bool First = CondReg == AMDGPU::NoRegister; 882 bool First = CondReg == AMDGPU::NoRegister;lib/Target/AMDGPU/AMDGPURegisterInfo.cpp
105 static const MCPhysReg NoCalleeSavedReg = AMDGPU::NoRegister;
lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp1978 .Default(AMDGPU::NoRegister); 2102 return getSpecialRegForName(Str) != AMDGPU::NoRegister; 2126 return AMDGPU::NoRegister; 2131 return AMDGPU::NoRegister; 2136 return AMDGPU::NoRegister; 2192 return AMDGPU::NoRegister; 2200 return AMDGPU::NoRegister; 2205 return AMDGPU::NoRegister; 2215 unsigned Reg = AMDGPU::NoRegister; 2218 return AMDGPU::NoRegister; 2223 return AMDGPU::NoRegister; 2225 return AMDGPU::NoRegister; 2232 return AMDGPU::NoRegister; 2234 return AMDGPU::NoRegister; 2236 return AMDGPU::NoRegister; 2238 return AMDGPU::NoRegister; 2242 return AMDGPU::NoRegister; 2254 Reg = AMDGPU::NoRegister; 2258 if (Reg == AMDGPU::NoRegister) 2265 return Reg != AMDGPU::NoRegister && subtargetHasRegister(*TRI, Reg); 2733 return AMDGPU::NoRegister; 2829 if (SGPRUsed != AMDGPU::NoRegister) { 4810 Inst.addOperand(MCOperand::createReg(AMDGPU::NoRegister)); 4833 Inst.getOperand(OperandIdx[2]).setReg(AMDGPU::NoRegister); 4834 Inst.getOperand(OperandIdx[3]).setReg(AMDGPU::NoRegister); 4838 if (Inst.getOperand(OperandIdx[i]).getReg() != AMDGPU::NoRegister) {lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
549 unsigned NewVdata = AMDGPU::NoRegister; 560 if (NewVdata == AMDGPU::NoRegister) { 567 unsigned NewVAddr0 = AMDGPU::NoRegister; 577 if (NewVAddr0 == AMDGPU::NoRegister) 583 if (NewVdata != AMDGPU::NoRegister) { 592 if (NewVAddr0 != AMDGPU::NoRegister) {lib/Target/AMDGPU/GCNRegBankReassign.cpp
176 unsigned Reg = AMDGPU::NoRegister, int Bank = -1); 215 unsigned Reg = AMDGPU::NoRegister, 608 return AMDGPU::NoRegister; 616 return AMDGPU::NoRegister; 662 if (Reg == AMDGPU::NoRegister) { 778 computeStallCycles(C.Reg, AMDGPU::NoRegister, -1, true);lib/Target/AMDGPU/SIFrameLowering.cpp
79 return AMDGPU::NoRegister; 279 if (ScratchRsrcReg == AMDGPU::NoRegister || 281 return AMDGPU::NoRegister; 328 if (ScratchWaveOffsetReg == AMDGPU::NoRegister || 330 return std::make_pair(AMDGPU::NoRegister, false); 434 unsigned PreloadedPrivateBufferReg = AMDGPU::NoRegister; 440 bool OffsetRegUsed = ScratchWaveOffsetReg != AMDGPU::NoRegister && 442 bool ResourceRegUsed = ScratchRsrcReg != AMDGPU::NoRegister && 446 if (PreloadedScratchWaveOffsetReg == AMDGPU::NoRegister) 454 if (ResourceRegUsed && PreloadedPrivateBufferReg != AMDGPU::NoRegister) { 479 PreloadedPrivateBufferReg != AMDGPU::NoRegister && 604 || (PreloadedPrivateBufferReg == AMDGPU::NoRegister)) { 708 unsigned ScratchExecCopy = AMDGPU::NoRegister; 711 if (FuncInfo->SGPRForFPSaveRestoreCopy != AMDGPU::NoRegister) { 722 if (ScratchExecCopy == AMDGPU::NoRegister) { 748 if (ScratchExecCopy != AMDGPU::NoRegister) { 788 assert(ScratchSPReg != AMDGPU::NoRegister && 819 assert((!HasFP || (FuncInfo->SGPRForFPSaveRestoreCopy != AMDGPU::NoRegister || 823 assert((HasFP || (FuncInfo->SGPRForFPSaveRestoreCopy == AMDGPU::NoRegister && 854 if (FuncInfo->SGPRForFPSaveRestoreCopy != AMDGPU::NoRegister) { 875 unsigned ScratchExecCopy = AMDGPU::NoRegister; 882 if (ScratchExecCopy == AMDGPU::NoRegister) { 906 if (ScratchExecCopy != AMDGPU::NoRegister) { 1088 if (FuncInfo->SGPRForFPSaveRestoreCopy != AMDGPU::NoRegister)lib/Target/AMDGPU/SIISelLowering.cpp
1666 assert(Reg != AMDGPU::NoRegister); 1684 assert(Reg != AMDGPU::NoRegister); 1851 if (PrivateSegmentWaveByteOffsetReg == AMDGPU::NoRegister) { 2994 if (Reg == AMDGPU::NoRegister) { 3345 assert(Idx->getReg() != AMDGPU::NoRegister); 3504 if (Idx->getReg() == AMDGPU::NoRegister) { 4613 assert(UserSGPR != AMDGPU::NoRegister); 4676 assert(UserSGPR != AMDGPU::NoRegister);lib/Target/AMDGPU/SIInsertSkips.cpp
382 unsigned SReg = AMDGPU::NoRegister;
lib/Target/AMDGPU/SIInstrInfo.cpp1246 if (TIDReg == AMDGPU::NoRegister) 2602 return AMDGPU::NoRegister; 3151 return AMDGPU::NoRegister; 3289 if (Reg == AMDGPU::NoRegister || Register::isVirtualRegister(Reg)) 3442 if (SGPRUsed != AMDGPU::NoRegister) { 3491 Register SGPRUsed = AMDGPU::NoRegister; 4025 bool HasImplicitSGPR = findImplicitSGPRRead(MI) != AMDGPU::NoRegister; 4159 if (SGPRReg != AMDGPU::NoRegister) { 5054 unsigned NewDstReg = AMDGPU::NoRegister; 5797 if (SGPRReg != AMDGPU::NoRegister) 5800 unsigned UsedSGPRs[3] = { AMDGPU::NoRegister }; 5839 if (UsedSGPRs[0] != AMDGPU::NoRegister) { 5844 if (SGPRReg == AMDGPU::NoRegister && UsedSGPRs[1] != AMDGPU::NoRegister) { 5844 if (SGPRReg == AMDGPU::NoRegister && UsedSGPRs[1] != AMDGPU::NoRegister) { 5923 return AMDGPU::NoRegister; 5943 return AMDGPU::NoRegister; 5951 return AMDGPU::NoRegister; 5957 return AMDGPU::NoRegister; 5965 return AMDGPU::NoRegister;lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
291 if (LaneVGPR == AMDGPU::NoRegister) { 341 Spill.Lanes.resize(NumLanes, AMDGPU::NoRegister);lib/Target/AMDGPU/SIMachineFunctionInfo.h
318 unsigned TIDReg = AMDGPU::NoRegister; 506 return (I == VGPRToAGPRSpills.end()) ? (MCPhysReg)AMDGPU::NoRegisterlib/Target/AMDGPU/SIOptimizeExecMasking.cpp
73 return AMDGPU::NoRegister; 94 return AMDGPU::NoRegister; 135 return AMDGPU::NoRegister; 248 if (CopyFromExec != AMDGPU::NoRegister) 294 if (CopyToExec == AMDGPU::NoRegister)lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp
117 return AMDGPU::NoRegister; 125 if (SavedExec == AMDGPU::NoRegister) 205 return AMDGPU::NoRegister; 211 return AMDGPU::NoRegister; 221 return AMDGPU::NoRegister; 228 return AMDGPU::NoRegister; 235 return AMDGPU::NoRegister; 240 return AMDGPU::NoRegister; 244 return AMDGPU::NoRegister; 251 return AMDGPU::NoRegister;lib/Target/AMDGPU/SIRegisterInfo.cpp
219 if (ScratchWaveOffsetReg != AMDGPU::NoRegister) { 225 if (ScratchRSrcReg != AMDGPU::NoRegister) { 238 if (StackPtrReg != AMDGPU::NoRegister) { 244 if (FrameReg != AMDGPU::NoRegister) { 556 if (Reg == AMDGPU::NoRegister) 653 SOffset = AMDGPU::NoRegister; 665 if (SOffset == AMDGPU::NoRegister) { 703 if (TmpReg != AMDGPU::NoRegister) { 727 if (!IsStore && TmpReg != AMDGPU::NoRegister) 774 unsigned M0CopyReg = AMDGPU::NoRegister; 853 if (M0CopyReg != AMDGPU::NoRegister) { 885 unsigned M0CopyReg = AMDGPU::NoRegister; 943 if (M0CopyReg != AMDGPU::NoRegister) { 1512 return AMDGPU::NoRegister;