reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
216 RegisterBank VCCRegBank(/* ID */ AMDGPU::VCCRegBankID, /* Name */ "VCC", /* Size */ 64, /* CoveredRegClasses */ VCCRegBankCoverageData, /* NumRegClasses */ 114);
lib/Target/AMDGPU/AMDGPUGenRegisterBankInfo.def135 if (BankID == AMDGPU::VCCRegBankID) 142 assert(BankID != AMDGPU::VCCRegBankID); 146 assert(BankID != AMDGPU::VCCRegBankID);lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
109 return RB->getID() == AMDGPU::VCCRegBankID; 270 if (DstRB->getID() == AMDGPU::VCCRegBankID) { 1259 if (SrcBank->getID() == AMDGPU::VCCRegBankID && DstSize <= 32) {lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
132 Src.getID() == AMDGPU::VCCRegBankID)) 136 Src.getID() == AMDGPU::VCCRegBankID) 353 { { AMDGPU::VCCRegBankID }, 1 }, 397 {AMDGPU::getValueMapping(AMDGPU::VCCRegBankID, Size), 398 AMDGPU::getValueMapping(AMDGPU::VCCRegBankID, Size), 399 AMDGPU::getValueMapping(AMDGPU::VCCRegBankID, Size)}), 489 getOperandsMapping({AMDGPU::getValueMapping(AMDGPU::VCCRegBankID, 1), 497 getOperandsMapping({AMDGPU::getValueMapping(AMDGPU::VCCRegBankID, 1), 505 getOperandsMapping({AMDGPU::getValueMapping(AMDGPU::VCCRegBankID, 1), 526 AMDGPU::getValueMapping(AMDGPU::VCCRegBankID, 1), 568 AMDGPU::getValueMapping(AMDGPU::VCCRegBankID, 1), 571 AMDGPU::getValueMapping(AMDGPU::VCCRegBankID, 1)}), 587 {AMDGPU::getValueMapping(AMDGPU::VCCRegBankID, 1), nullptr }), 1953 AMDGPU::VCCRegBankID : AMDGPU::VGPRRegBankID; 1964 unsigned BankID = Size == 1 ? AMDGPU::VCCRegBankID : AMDGPU::VGPRRegBankID; 2161 } else if (OpBank == AMDGPU::VCCRegBankID) { 2164 if (ResultBank != -1 && ResultBank != AMDGPU::VCCRegBankID) { 2208 TargetBankID = AMDGPU::VCCRegBankID; 2209 BankLHS = AMDGPU::VCCRegBankID; 2210 BankRHS = AMDGPU::VCCRegBankID; 2223 AMDGPU::VCCRegBankID); 2225 AMDGPU::VCCRegBankID); 2230 } else if (BankLHS == AMDGPU::VCCRegBankID || BankRHS == AMDGPU::VCCRegBankID) { 2230 } else if (BankLHS == AMDGPU::VCCRegBankID || BankRHS == AMDGPU::VCCRegBankID) { 2231 TargetBankID = AMDGPU::VCCRegBankID; 2232 BankLHS = AMDGPU::VCCRegBankID; 2233 BankRHS = AMDGPU::VCCRegBankID; 2460 OpdsMapping[0] = AMDGPU::getValueMapping(AMDGPU::VCCRegBankID, 1); 2496 unsigned Op0Bank = CanUseSCC ? AMDGPU::SCCRegBankID : AMDGPU::VCCRegBankID; 2625 = AMDGPU::getValueMapping(AMDGPU::VCCRegBankID, Size); 2654 OpdsMapping[1] = AMDGPU::getValueMapping(AMDGPU::VCCRegBankID, Dst1Size); 2670 OpdsMapping[0] = AMDGPU::getValueMapping(AMDGPU::VCCRegBankID, DstSize); 2724 OpdsMapping[2] = AMDGPU::getValueMapping(AMDGPU::VCCRegBankID, 1); 2820 OpdsMapping[0] = AMDGPU::getValueMapping(AMDGPU::VCCRegBankID, 1); 2826 OpdsMapping[1] = AMDGPU::getValueMapping(AMDGPU::VCCRegBankID, 1); 2916 AMDGPU::SCCRegBankID : AMDGPU::VCCRegBankID; 2920 CondBank = SGPRSrcs ? AMDGPU::SCCRegBankID : AMDGPU::VCCRegBankID; 2922 CondBank = AMDGPU::VCCRegBankID; 2927 assert(CondBank == AMDGPU::VCCRegBankID || CondBank == AMDGPU::SCCRegBankID); 2969 Bank = AMDGPU::VCCRegBankID;lib/Target/AMDGPU/SIRegisterInfo.cpp
1784 case AMDGPU::VCCRegBankID: