|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/AMDGPU/AMDGPUGenDAGISel.inc47754 /*102856*/ OPC_MorphNodeTo1, TARGET_VAL(AMDGPU::V_LSHRREV_B32_e64), 0,
47759 /*102865*/ OPC_MorphNodeTo1, TARGET_VAL(AMDGPU::V_LSHRREV_B32_e64), 0,
74321 /*164410*/ OPC_EmitNode1, TARGET_VAL(AMDGPU::V_LSHRREV_B32_e64), 0,
75387 /*167142*/ OPC_EmitNode1, TARGET_VAL(AMDGPU::V_LSHRREV_B32_e64), 0,
75434 /*167296*/ OPC_EmitNode1, TARGET_VAL(AMDGPU::V_LSHRREV_B32_e64), 0,
gen/lib/Target/AMDGPU/AMDGPUGenGlobalISel.inc15686 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AMDGPU::V_LSHRREV_B32_e64,
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc55595 case AMDGPU::V_LSHRREV_B32_e64:
93050 { AMDGPU::V_LSHRREV_B32_e64, AMDGPU::V_LSHR_B32_e64 },
93285 { AMDGPU::V_LSHR_B32_e64, AMDGPU::V_LSHRREV_B32_e64 },
96996 { AMDGPU::V_LSHRREV_B32_e64, AMDGPU::V_LSHRREV_B32_e64_gfx6_gfx7, AMDGPU::V_LSHRREV_B32_e64_vi, (uint16_t)-1U, (uint16_t)-1U, (uint16_t)-1U, (uint16_t)-1U, AMDGPU::V_LSHRREV_B32_e64_gfx10, (uint16_t)-1U },
98770 { AMDGPU::V_LSHRREV_B32_e64, AMDGPU::V_LSHRREV_B32_e32 },
99353 { AMDGPU::V_LSHRREV_B32_e32, AMDGPU::V_LSHRREV_B32_e64 },
lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp 3144 case AMDGPU::V_LSHRREV_B32_e64:
lib/Target/AMDGPU/SIFoldOperands.cpp 903 case AMDGPU::V_LSHRREV_B32_e64:
lib/Target/AMDGPU/SIInstrInfo.cpp 4918 NewOpcode = AMDGPU::V_LSHRREV_B32_e64;
5694 BuildMI(*MBB, Inst, DL, get(AMDGPU::V_LSHRREV_B32_e64), TmpReg)
lib/Target/AMDGPU/SIPeepholeSDWA.cpp 556 case AMDGPU::V_LSHRREV_B32_e64:
589 Opcode != AMDGPU::V_LSHRREV_B32_e64);
lib/Target/AMDGPU/SIRegisterInfo.cpp 1117 BuildMI(*MBB, MI, DL, TII->get(AMDGPU::V_LSHRREV_B32_e64), ResultReg)
1125 BuildMI(*MBB, *MIB, DL, TII->get(AMDGPU::V_LSHRREV_B32_e64),