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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenDAGISel.inc50332 /*108152*/ OPC_MorphNodeTo1, TARGET_VAL(AMDGPU::V_CNDMASK_B32_e64), 0,
50339 /*108171*/ OPC_MorphNodeTo1, TARGET_VAL(AMDGPU::V_CNDMASK_B32_e64), 0,
50346 /*108190*/ OPC_MorphNodeTo1, TARGET_VAL(AMDGPU::V_CNDMASK_B32_e64), 0,
50353 /*108209*/ OPC_MorphNodeTo1, TARGET_VAL(AMDGPU::V_CNDMASK_B32_e64), 0,
60081 /*131452*/ OPC_MorphNodeTo1, TARGET_VAL(AMDGPU::V_CNDMASK_B32_e64), 0,
60092 /*131481*/ OPC_MorphNodeTo1, TARGET_VAL(AMDGPU::V_CNDMASK_B32_e64), 0,
60126 /*131572*/ OPC_EmitNode1, TARGET_VAL(AMDGPU::V_CNDMASK_B32_e64), 0,
63061 /*137561*/ OPC_MorphNodeTo1, TARGET_VAL(AMDGPU::V_CNDMASK_B32_e64), 0,
63072 /*137598*/ OPC_MorphNodeTo1, TARGET_VAL(AMDGPU::V_CNDMASK_B32_e64), 0,
63099 /*137686*/ OPC_EmitNode1, TARGET_VAL(AMDGPU::V_CNDMASK_B32_e64), 0,
63106 /*137721*/ OPC_EmitNode1, TARGET_VAL(AMDGPU::V_CNDMASK_B32_e64), 0,
63160 /*137867*/ OPC_MorphNodeTo1, TARGET_VAL(AMDGPU::V_CNDMASK_B32_e64), 0,
63171 /*137895*/ OPC_MorphNodeTo1, TARGET_VAL(AMDGPU::V_CNDMASK_B32_e64), 0,
63209 /*137999*/ OPC_EmitNode1, TARGET_VAL(AMDGPU::V_CNDMASK_B32_e64), 0,
75172 /*166552*/ OPC_MorphNodeTo1, TARGET_VAL(AMDGPU::V_CNDMASK_B32_e64), 0,
75181 /*166581*/ OPC_EmitNode1, TARGET_VAL(AMDGPU::V_CNDMASK_B32_e64), 0,
75192 /*166622*/ OPC_EmitNode1, TARGET_VAL(AMDGPU::V_CNDMASK_B32_e64), 0,
75240 /*166738*/ OPC_MorphNodeTo1, TARGET_VAL(AMDGPU::V_CNDMASK_B32_e64), 0,
75249 /*166767*/ OPC_EmitNode1, TARGET_VAL(AMDGPU::V_CNDMASK_B32_e64), 0,
75260 /*166799*/ OPC_EmitNode1, TARGET_VAL(AMDGPU::V_CNDMASK_B32_e64), 0,
gen/lib/Target/AMDGPU/AMDGPUGenGlobalISel.inc18406 GIR_BuildMI, /*InsnID*/1, /*Opcode*/AMDGPU::V_CNDMASK_B32_e64,
18444 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AMDGPU::V_CNDMASK_B32_e64,
18478 GIR_BuildMI, /*InsnID*/1, /*Opcode*/AMDGPU::V_CNDMASK_B32_e64,
18540 GIR_BuildMI, /*InsnID*/1, /*Opcode*/AMDGPU::V_CNDMASK_B32_e64,
18578 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AMDGPU::V_CNDMASK_B32_e64,
18612 GIR_BuildMI, /*InsnID*/1, /*Opcode*/AMDGPU::V_CNDMASK_B32_e64,
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc56426 case AMDGPU::V_CNDMASK_B32_e64:
96723 { AMDGPU::V_CNDMASK_B32_e64, AMDGPU::V_CNDMASK_B32_e64_gfx6_gfx7, AMDGPU::V_CNDMASK_B32_e64_vi, (uint16_t)-1U, (uint16_t)-1U, (uint16_t)-1U, (uint16_t)-1U, AMDGPU::V_CNDMASK_B32_e64_gfx10, (uint16_t)-1U },
98702 { AMDGPU::V_CNDMASK_B32_e64, AMDGPU::V_CNDMASK_B32_e32 },
99285 { AMDGPU::V_CNDMASK_B32_e32, AMDGPU::V_CNDMASK_B32_e64 },
lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp 1127 BuildMI(*BB, &I, DL, TII.get(AMDGPU::V_CNDMASK_B32_e64), DstReg)
1264 BuildMI(MBB, I, DL, TII.get(AMDGPU::V_CNDMASK_B32_e64), DstReg)
lib/Target/AMDGPU/AMDGPUMacroFusion.cpp 37 case AMDGPU::V_CNDMASK_B32_e64: {
lib/Target/AMDGPU/SIFoldOperands.cpp 1084 Opc == AMDGPU::V_CNDMASK_B32_e64 ||
lib/Target/AMDGPU/SIISelLowering.cpp 3766 BuildMI(*BB, MI, DL, TII->get(AMDGPU::V_CNDMASK_B32_e64), DstLo)
3772 BuildMI(*BB, MI, DL, TII->get(AMDGPU::V_CNDMASK_B32_e64), DstHi)
lib/Target/AMDGPU/SIInstrInfo.cpp 830 BuildMI(MBB, I, DL, get(AMDGPU::V_CNDMASK_B32_e64), DstReg)
845 BuildMI(MBB, I, DL, get(AMDGPU::V_CNDMASK_B32_e64), DstReg)
859 BuildMI(MBB, I, DL, get(AMDGPU::V_CNDMASK_B32_e64), DstReg)
873 BuildMI(MBB, I, DL, get(AMDGPU::V_CNDMASK_B32_e64), DstReg)
887 BuildMI(MBB, I, DL, get(AMDGPU::V_CNDMASK_B32_e64), DstReg)
905 BuildMI(MBB, I, DL, get(AMDGPU::V_CNDMASK_B32_e64), DstReg)
923 BuildMI(MBB, I, DL, get(AMDGPU::V_CNDMASK_B32_e64), DstReg)
3020 case AMDGPU::V_CNDMASK_B32_e64:
lib/Target/AMDGPU/SILowerI1Copies.cpp 525 BuildMI(MBB, MI, DL, TII->get(AMDGPU::V_CNDMASK_B32_e64), DstReg)
lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp 239 if (!Sel || Sel->getOpcode() != AMDGPU::V_CNDMASK_B32_e64)