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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenDAGISel.inc28489 /* 59724*/ OPC_MorphNodeTo2, TARGET_VAL(AMDGPU::S_XOR_B32), 0,
58068 /*127232*/ OPC_MorphNodeTo2, TARGET_VAL(AMDGPU::S_XOR_B32), 0,
58126 /*127380*/ OPC_MorphNodeTo2, TARGET_VAL(AMDGPU::S_XOR_B32), 0,
59565 /*130303*/ OPC_MorphNodeTo2, TARGET_VAL(AMDGPU::S_XOR_B32), 0,
74898 /*165876*/ OPC_MorphNodeTo2, TARGET_VAL(AMDGPU::S_XOR_B32), 0,
74915 /*165918*/ OPC_MorphNodeTo2, TARGET_VAL(AMDGPU::S_XOR_B32), 0,
74994 /*166129*/ OPC_MorphNodeTo2, TARGET_VAL(AMDGPU::S_XOR_B32), 0,
gen/lib/Target/AMDGPU/AMDGPUGenGlobalISel.inc17801 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AMDGPU::S_XOR_B32,
17865 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AMDGPU::S_XOR_B32,
18036 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AMDGPU::S_XOR_B32,
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc58919 case AMDGPU::S_XOR_B32:
95536 { AMDGPU::S_XOR_B32, AMDGPU::S_XOR_B32_gfx6_gfx7, AMDGPU::S_XOR_B32_vi, (uint16_t)-1U, (uint16_t)-1U, (uint16_t)-1U, (uint16_t)-1U, AMDGPU::S_XOR_B32_gfx10, (uint16_t)-1U },
lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp 256 return Is64 ? AMDGPU::S_XOR_B64 : AMDGPU::S_XOR_B32;
lib/Target/AMDGPU/SIFoldOperands.cpp 885 case AMDGPU::S_XOR_B32:
1066 MI->getOpcode() == AMDGPU::S_XOR_B32) {
lib/Target/AMDGPU/SIInstrInfo.cpp 1397 MI.setDesc(get(AMDGPU::S_XOR_B32));
3761 case AMDGPU::S_XOR_B32: return AMDGPU::V_XOR_B32_e64;
4857 splitScalar64BitBinaryOp(Worklist, Inst, AMDGPU::S_XOR_B32, MDT);
5203 Xor = BuildMI(MBB, MII, DL, get(AMDGPU::S_XOR_B32), NewDest)
5208 Xor = BuildMI(MBB, MII, DL, get(AMDGPU::S_XOR_B32), NewDest)
5212 Xor = BuildMI(MBB, MII, DL, get(AMDGPU::S_XOR_B32), Temp)
lib/Target/AMDGPU/SILowerControlFlow.cpp 507 XorOpc = AMDGPU::S_XOR_B32;
lib/Target/AMDGPU/SILowerI1Copies.cpp 468 XorOp = AMDGPU::S_XOR_B32;
lib/Target/AMDGPU/SIOptimizeExecMasking.cpp 119 case AMDGPU::S_XOR_B32:
160 case AMDGPU::S_XOR_B32:
196 MI.setDesc(TII.get(AMDGPU::S_XOR_B32));
lib/Target/AMDGPU/SIShrinkInstructions.cpp 347 } else if (Opc == AMDGPU::S_XOR_B32) {
688 MI.getOpcode() == AMDGPU::S_XOR_B32) {