reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AMDGPU/AMDGPUGenDAGISel.inc

62454 /*136586*/      OPC_MorphNodeTo1, TARGET_VAL(AMDGPU::S_MOV_B64), 0,
62468 /*136613*/        OPC_MorphNodeTo1, TARGET_VAL(AMDGPU::S_MOV_B64), 0,
75085 /*166313*/      OPC_MorphNodeTo1, TARGET_VAL(AMDGPU::S_MOV_B64), 0,

gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc

59686   case AMDGPU::S_MOV_B64:
95461   { AMDGPU::S_MOV_B64, AMDGPU::S_MOV_B64_gfx6_gfx7, AMDGPU::S_MOV_B64_vi, (uint16_t)-1U, (uint16_t)-1U, (uint16_t)-1U, (uint16_t)-1U, AMDGPU::S_MOV_B64_gfx10, (uint16_t)-1U },

lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp

 1439     ResInst = BuildMI(*BB, &I, DL, TII.get(AMDGPU::S_MOV_B64), DstReg)

lib/Target/AMDGPU/SIFixSGPRCopies.cpp

  349     SMovOp = AMDGPU::S_MOV_B64;

lib/Target/AMDGPU/SIFrameLowering.cpp

  618         const MCInstrDesc &Mov64 = TII->get(AMDGPU::S_MOV_B64);
  750     unsigned ExecMov = ST.isWave32() ? AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64;
  908     unsigned ExecMov = ST.isWave32() ? AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64;

lib/Target/AMDGPU/SIISelLowering.cpp

 3290   unsigned MovExecOpc = ST.isWave32() ? AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64;
 3654     BuildMI(*BB, &*BB->begin(), MI.getDebugLoc(), TII->get(AMDGPU::S_MOV_B64),

lib/Target/AMDGPU/SIInsertSkips.cpp

  288                                                      : AMDGPU::S_MOV_B64), Exec)

lib/Target/AMDGPU/SIInsertWaitcnts.cpp

 1431               TII->get(ST->isWave32() ? AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64),

lib/Target/AMDGPU/SIInstrInfo.cpp

  578         BuildMI(MBB, MI, DL, get(AMDGPU::S_MOV_B64), AMDGPU::VCC)
  596     BuildMI(MBB, MI, DL, get(AMDGPU::S_MOV_B64), DestReg)
  686       Opcode =  AMDGPU::S_MOV_B64;
  769     BuildMI(MBB, MI, DL, get(AMDGPU::S_MOV_B64), DestReg)
  789       Opcode =  AMDGPU::S_MOV_B64;
  973     return AMDGPU::S_MOV_B64;
 1379     MI.setDesc(get(AMDGPU::S_MOV_B64));
 1540     MI.setDesc(get(ST.isWave32() ? AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64));
 2265   case AMDGPU::S_MOV_B64:
 2314   case AMDGPU::S_MOV_B64:
 3838     Opcode = (Size == 64) ? AMDGPU::S_MOV_B64 : AMDGPU::S_MOV_B32;
 4412   unsigned MovExecOpc = ST.isWave32() ? AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64;
 4490   BuildMI(MBB, MI, MI.getDebugLoc(), TII.get(AMDGPU::S_MOV_B64), Zero64)

lib/Target/AMDGPU/SILowerI1Copies.cpp

  473     MovOp = AMDGPU::S_MOV_B64;

lib/Target/AMDGPU/SIOptimizeExecMasking.cpp

   62   case AMDGPU::S_MOV_B64:
   80   case AMDGPU::S_MOV_B64: