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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenDAGISel.inc30633 /* 64650*/ OPC_MorphNodeTo1, TARGET_VAL(AMDGPU::S_LOAD_DWORDX4_IMM), 0|OPFL_Chain|OPFL_MemRefs,
30663 /* 64719*/ OPC_MorphNodeTo1, TARGET_VAL(AMDGPU::S_LOAD_DWORDX4_IMM), 0|OPFL_Chain|OPFL_MemRefs,
30876 /* 65181*/ OPC_MorphNodeTo1, TARGET_VAL(AMDGPU::S_LOAD_DWORDX4_IMM), 0|OPFL_Chain|OPFL_MemRefs,
30885 /* 65203*/ OPC_MorphNodeTo1, TARGET_VAL(AMDGPU::S_LOAD_DWORDX4_IMM), 0|OPFL_Chain|OPFL_MemRefs,
31303 /* 66224*/ OPC_MorphNodeTo1, TARGET_VAL(AMDGPU::S_LOAD_DWORDX4_IMM), 0|OPFL_Chain|OPFL_MemRefs,
31333 /* 66293*/ OPC_MorphNodeTo1, TARGET_VAL(AMDGPU::S_LOAD_DWORDX4_IMM), 0|OPFL_Chain|OPFL_MemRefs,
31456 /* 66557*/ OPC_MorphNodeTo1, TARGET_VAL(AMDGPU::S_LOAD_DWORDX4_IMM), 0|OPFL_Chain|OPFL_MemRefs,
31465 /* 66579*/ OPC_MorphNodeTo1, TARGET_VAL(AMDGPU::S_LOAD_DWORDX4_IMM), 0|OPFL_Chain|OPFL_MemRefs,
gen/lib/Target/AMDGPU/AMDGPUGenGlobalISel.inc 6408 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AMDGPU::S_LOAD_DWORDX4_IMM,
6454 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AMDGPU::S_LOAD_DWORDX4_IMM,
6500 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AMDGPU::S_LOAD_DWORDX4_IMM,
6515 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AMDGPU::S_LOAD_DWORDX4_IMM,
7004 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AMDGPU::S_LOAD_DWORDX4_IMM,
7065 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AMDGPU::S_LOAD_DWORDX4_IMM,
7149 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AMDGPU::S_LOAD_DWORDX4_IMM,
7170 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AMDGPU::S_LOAD_DWORDX4_IMM,
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc54656 case AMDGPU::S_LOAD_DWORDX4_IMM:
95434 { AMDGPU::S_LOAD_DWORDX4_IMM, AMDGPU::S_LOAD_DWORDX4_IMM_si, AMDGPU::S_LOAD_DWORDX4_IMM_vi, (uint16_t)-1U, (uint16_t)-1U, (uint16_t)-1U, (uint16_t)-1U, AMDGPU::S_LOAD_DWORDX4_IMM_gfx10, (uint16_t)-1U },
lib/Target/AMDGPU/SIFrameLowering.cpp 585 const MCInstrDesc &LoadDwordX4 = TII->get(AMDGPU::S_LOAD_DWORDX4_IMM);