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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenDAGISel.inc52845 /*114695*/ OPC_MorphNodeTo2, TARGET_VAL(AMDGPU::S_AND_B64), 0,
52892 /*114820*/ OPC_MorphNodeTo2, TARGET_VAL(AMDGPU::S_AND_B64), 0,
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc58876 case AMDGPU::S_AND_B64:
95139 { AMDGPU::S_AND_B64, AMDGPU::S_AND_B64_gfx6_gfx7, AMDGPU::S_AND_B64_vi, (uint16_t)-1U, (uint16_t)-1U, (uint16_t)-1U, (uint16_t)-1U, AMDGPU::S_AND_B64_gfx10, (uint16_t)-1U },
lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp 2069 : AMDGPU::S_AND_B64,
lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp 252 return Is64 ? AMDGPU::S_AND_B64 : AMDGPU::S_AND_B32;
lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp 675 AMDGPU::S_AND_B32 : AMDGPU::S_AND_B64;
lib/Target/AMDGPU/SIInsertSkips.cpp 293 unsigned Opcode = KillVal ? AMDGPU::S_ANDN2_B64 : AMDGPU::S_AND_B64;
350 const unsigned And = IsWave32 ? AMDGPU::S_AND_B32 : AMDGPU::S_AND_B64;
lib/Target/AMDGPU/SIInstrInfo.cpp 4331 ST.isWave32() ? AMDGPU::S_AND_B32 : AMDGPU::S_AND_B64;
4846 case AMDGPU::S_AND_B64:
4955 BuildMI(*MBB, Inst, Inst.getDebugLoc(), get(AMDGPU::S_AND_B64),
lib/Target/AMDGPU/SILowerControlFlow.cpp 514 AndOpc = AMDGPU::S_AND_B64;
557 case AMDGPU::S_AND_B64:
lib/Target/AMDGPU/SILowerI1Copies.cpp 474 AndOp = AMDGPU::S_AND_B64;
lib/Target/AMDGPU/SIOptimizeExecMasking.cpp 101 case AMDGPU::S_AND_B64:
140 case AMDGPU::S_AND_B64:
lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp 195 const unsigned AndOpc = Wave32 ? AMDGPU::S_AND_B32 : AMDGPU::S_AND_B64;
lib/Target/AMDGPU/SIWholeQuadMode.cpp 639 AMDGPU::S_AND_B32 : AMDGPU::S_AND_B64),