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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenDAGISel.inc29562 /* 62349*/ OPC_MorphNodeTo1, TARGET_VAL(AMDGPU::BUFFER_LOAD_DWORD_OFFEN), 0|OPFL_Chain|OPFL_MemRefs,
39886 /* 85639*/ OPC_MorphNodeTo1, TARGET_VAL(AMDGPU::BUFFER_LOAD_DWORD_OFFEN), 0|OPFL_Chain|OPFL_MemRefs,
40001 /* 85892*/ OPC_MorphNodeTo1, TARGET_VAL(AMDGPU::BUFFER_LOAD_DWORD_OFFEN), 0|OPFL_Chain|OPFL_MemRefs,
40165 /* 86291*/ OPC_MorphNodeTo1, TARGET_VAL(AMDGPU::BUFFER_LOAD_DWORD_OFFEN), 0|OPFL_Chain|OPFL_MemRefs,
40496 /* 87209*/ OPC_MorphNodeTo1, TARGET_VAL(AMDGPU::BUFFER_LOAD_DWORD_OFFEN), 0|OPFL_Chain|OPFL_MemRefs,
gen/lib/Target/AMDGPU/AMDGPUGenGlobalISel.inc 4522 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AMDGPU::BUFFER_LOAD_DWORD_OFFEN,
4547 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AMDGPU::BUFFER_LOAD_DWORD_OFFEN,
4572 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AMDGPU::BUFFER_LOAD_DWORD_OFFEN,
4597 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AMDGPU::BUFFER_LOAD_DWORD_OFFEN,
4622 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AMDGPU::BUFFER_LOAD_DWORD_OFFEN,
4647 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AMDGPU::BUFFER_LOAD_DWORD_OFFEN,
4672 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AMDGPU::BUFFER_LOAD_DWORD_OFFEN,
4697 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AMDGPU::BUFFER_LOAD_DWORD_OFFEN,
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc48614 case AMDGPU::BUFFER_LOAD_DWORD_OFFEN:
94137 { AMDGPU::BUFFER_LOAD_DWORD_OFFEN, AMDGPU::BUFFER_LOAD_DWORD_OFFEN_gfx6_gfx7, AMDGPU::BUFFER_LOAD_DWORD_OFFEN_vi, (uint16_t)-1U, (uint16_t)-1U, (uint16_t)-1U, (uint16_t)-1U, AMDGPU::BUFFER_LOAD_DWORD_OFFEN_gfx10, (uint16_t)-1U },
gen/lib/Target/AMDGPU/AMDGPUGenSearchableTables.inc10248 { BUFFER_LOAD_DWORDX2_OFFEN, BUFFER_LOAD_DWORD_OFFEN, 0x2, 0x1, 0x1, 0x1 }, // 346
10266 { BUFFER_LOAD_DWORDX3_OFFEN, BUFFER_LOAD_DWORD_OFFEN, 0x3, 0x1, 0x1, 0x1 }, // 364
10284 { BUFFER_LOAD_DWORDX4_OFFEN, BUFFER_LOAD_DWORD_OFFEN, 0x4, 0x1, 0x1, 0x1 }, // 382
10302 { BUFFER_LOAD_DWORD_OFFEN, BUFFER_LOAD_DWORD_OFFEN, 0x1, 0x1, 0x1, 0x1 }, // 400
10302 { BUFFER_LOAD_DWORD_OFFEN, BUFFER_LOAD_DWORD_OFFEN, 0x1, 0x1, 0x1, 0x1 }, // 400
11169 { BUFFER_LOAD_DWORD_OFFEN, 0x1, 400 },
11170 { BUFFER_LOAD_DWORD_OFFEN, 0x2, 346 },
11171 { BUFFER_LOAD_DWORD_OFFEN, 0x3, 364 },
11172 { BUFFER_LOAD_DWORD_OFFEN, 0x4, 382 },
12064 { BUFFER_LOAD_DWORD_OFFEN, 400 },
lib/Target/AMDGPU/SIFrameLowering.cpp 174 TII->get(AMDGPU::BUFFER_LOAD_DWORD_OFFEN), SpillReg)
lib/Target/AMDGPU/SILoadStoreOptimizer.cpp 308 case AMDGPU::BUFFER_LOAD_DWORD_OFFEN:
lib/Target/AMDGPU/SIRegisterInfo.cpp 512 case AMDGPU::BUFFER_LOAD_DWORD_OFFEN: