|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/AMDGPU/AMDGPUGenGlobalISel.inc 533 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
534 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
540 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s16,
541 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s16,
559 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s16,
560 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s16,
578 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s16,
579 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s16,
665 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
666 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
698 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
699 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
742 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
743 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
788 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
789 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
823 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
859 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
895 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
931 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
967 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
1003 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
1039 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
1075 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
1111 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
1147 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
1183 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
1219 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
1255 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
1291 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
1327 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
1363 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
1453 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
1454 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
1540 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
13624 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s16,
13625 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
13643 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s16,
13644 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
13662 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s16,
13663 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
13681 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s16,
13682 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
13700 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s16,
13701 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
13719 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s16,
13720 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
13738 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s16,
13739 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
13947 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s16,
13948 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
14065 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
14084 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
14476 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s16,
14477 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
14478 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s16,
14479 GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s16,
15549 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
15550 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
15654 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
15655 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
15759 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
15760 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
15865 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s16,
16315 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s16,
17143 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
17144 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
17278 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
17279 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
17329 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
17330 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
17464 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
17465 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
17466 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s16,
17574 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
17575 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
17576 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s16,
17633 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
17634 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s16,
17660 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
17703 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
17747 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
17752 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s16,
17774 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s16,
17778 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
17814 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
17878 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
17907 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s16,
17909 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_s16,
17944 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s16,
18013 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
18049 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
18074 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
18196 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
18214 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
18217 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
18309 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
18327 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
18330 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
18388 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
18405 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
18424 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
18477 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
18522 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
18539 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
18558 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
18611 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
18654 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
18677 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
18719 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
18743 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s16,
18745 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_s16,
18802 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
18828 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
18834 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s16,
19000 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
19001 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
19135 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
19136 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
19270 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
19271 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
19405 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
19406 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
19540 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
19541 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
19585 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
19586 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
19630 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
19631 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
19675 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
19676 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
19810 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
19873 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
19935 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
20055 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,