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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenInstrInfo.inc 6505 static const MCOperandInfo OperandInfo104[] = { { AArch64::WSeqPairsClassRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::WSeqPairsClassRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::WSeqPairsClassRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6505 static const MCOperandInfo OperandInfo104[] = { { AArch64::WSeqPairsClassRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::WSeqPairsClassRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::WSeqPairsClassRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6505 static const MCOperandInfo OperandInfo104[] = { { AArch64::WSeqPairsClassRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::WSeqPairsClassRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::WSeqPairsClassRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
gen/lib/Target/AArch64/AArch64GenRegisterInfo.inc 3449 { WSeqPairsClass, WSeqPairsClassBits, 2555, 16, sizeof(WSeqPairsClassBits), AArch64::WSeqPairsClassRegClassID, 1, true },
7038 &AArch64MCRegisterClasses[WSeqPairsClassRegClassID],
lib/Target/AArch64/AArch64RegisterBankInfo.cpp 257 case AArch64::WSeqPairsClassRegClassID:
lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp 1122 AArch64MCRegisterClasses[AArch64::WSeqPairsClassRegClassID].contains(
5652 &AArch64MCRegisterClasses[AArch64::WSeqPairsClassRegClassID]);
lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp 1795 AArch64::WSeqPairsClassRegClassID,