reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
14952 MRI.getRegClass(AArch64::GPR64sponlyRegClassID).contains(MI->getOperand(1).getReg()) && 14975 MRI.getRegClass(AArch64::GPR64sponlyRegClassID).contains(MI->getOperand(1).getReg()) && 15059 MRI.getRegClass(AArch64::GPR64sponlyRegClassID).contains(MI->getOperand(0).getReg()) && 15074 MRI.getRegClass(AArch64::GPR64sponlyRegClassID).contains(MI->getOperand(1).getReg()) && 15102 MRI.getRegClass(AArch64::GPR64sponlyRegClassID).contains(MI->getOperand(0).getReg()) && 15117 MRI.getRegClass(AArch64::GPR64sponlyRegClassID).contains(MI->getOperand(1).getReg()) && 25906 MRI.getRegClass(AArch64::GPR64sponlyRegClassID).contains(MI->getOperand(1).getReg()) && 25929 MRI.getRegClass(AArch64::GPR64sponlyRegClassID).contains(MI->getOperand(1).getReg()) && 26044 MRI.getRegClass(AArch64::GPR64sponlyRegClassID).contains(MI->getOperand(0).getReg()) && 26059 MRI.getRegClass(AArch64::GPR64sponlyRegClassID).contains(MI->getOperand(1).getReg()) &&gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc
15668 MRI.getRegClass(AArch64::GPR64sponlyRegClassID).contains(MI->getOperand(1).getReg()) && 15691 MRI.getRegClass(AArch64::GPR64sponlyRegClassID).contains(MI->getOperand(1).getReg()) && 15775 MRI.getRegClass(AArch64::GPR64sponlyRegClassID).contains(MI->getOperand(0).getReg()) && 15790 MRI.getRegClass(AArch64::GPR64sponlyRegClassID).contains(MI->getOperand(1).getReg()) && 15818 MRI.getRegClass(AArch64::GPR64sponlyRegClassID).contains(MI->getOperand(0).getReg()) && 15833 MRI.getRegClass(AArch64::GPR64sponlyRegClassID).contains(MI->getOperand(1).getReg()) && 26622 MRI.getRegClass(AArch64::GPR64sponlyRegClassID).contains(MI->getOperand(1).getReg()) && 26645 MRI.getRegClass(AArch64::GPR64sponlyRegClassID).contains(MI->getOperand(1).getReg()) && 26760 MRI.getRegClass(AArch64::GPR64sponlyRegClassID).contains(MI->getOperand(0).getReg()) && 26775 MRI.getRegClass(AArch64::GPR64sponlyRegClassID).contains(MI->getOperand(1).getReg()) &&gen/lib/Target/AArch64/AArch64GenRegisterBank.inc
106 (1u << (AArch64::GPR64sponlyRegClassID - 0)) |
gen/lib/Target/AArch64/AArch64GenRegisterInfo.inc3463 { GPR64sponly, GPR64sponlyBits, 2597, 1, sizeof(GPR64sponlyBits), AArch64::GPR64sponlyRegClassID, 1, true }, 7206 &AArch64MCRegisterClasses[GPR64sponlyRegClassID],lib/Target/AArch64/AArch64RegisterBankInfo.cpp
250 case AArch64::GPR64sponlyRegClassID: