|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
Declarations
gen/lib/Target/AArch64/AArch64GenRegisterInfo.inc 5050 extern const TargetRegisterClass FPR16RegClass;
References
gen/lib/Target/AArch64/AArch64GenFastISel.inc 1444 return fastEmitInst_r(AArch64::SCVTFv1i16, &AArch64::FPR16RegClass, Op0, Op0IsKill);
1558 return fastEmitInst_r(AArch64::UCVTFv1i16, &AArch64::FPR16RegClass, Op0, Op0IsKill);
2708 return fastEmitInst_r(AArch64::FABSHr, &AArch64::FPR16RegClass, Op0, Op0IsKill);
2796 return fastEmitInst_r(AArch64::FRINTPHr, &AArch64::FPR16RegClass, Op0, Op0IsKill);
2884 return fastEmitInst_r(AArch64::FRINTMHr, &AArch64::FPR16RegClass, Op0, Op0IsKill);
2972 return fastEmitInst_r(AArch64::FRINTIHr, &AArch64::FPR16RegClass, Op0, Op0IsKill);
3060 return fastEmitInst_r(AArch64::FNEGHr, &AArch64::FPR16RegClass, Op0, Op0IsKill);
3203 return fastEmitInst_r(AArch64::FCVTHSr, &AArch64::FPR16RegClass, Op0, Op0IsKill);
3210 return fastEmitInst_r(AArch64::FCVTHDr, &AArch64::FPR16RegClass, Op0, Op0IsKill);
3512 return fastEmitInst_r(AArch64::FRINTXHr, &AArch64::FPR16RegClass, Op0, Op0IsKill);
3600 return fastEmitInst_r(AArch64::FRINTAHr, &AArch64::FPR16RegClass, Op0, Op0IsKill);
3688 return fastEmitInst_r(AArch64::FSQRTHr, &AArch64::FPR16RegClass, Op0, Op0IsKill);
3776 return fastEmitInst_r(AArch64::FRINTZHr, &AArch64::FPR16RegClass, Op0, Op0IsKill);
3959 return fastEmitInst_r(AArch64::SCVTFUWHri, &AArch64::FPR16RegClass, Op0, Op0IsKill);
3989 return fastEmitInst_r(AArch64::SCVTFUXHri, &AArch64::FPR16RegClass, Op0, Op0IsKill);
4124 return fastEmitInst_r(AArch64::UCVTFUWHri, &AArch64::FPR16RegClass, Op0, Op0IsKill);
4154 return fastEmitInst_r(AArch64::UCVTFUXHri, &AArch64::FPR16RegClass, Op0, Op0IsKill);
5008 return fastEmitInst_rr(AArch64::FCMPHrr, &AArch64::FPR16RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
6162 return fastEmitInst_rr(AArch64::FADDHrr, &AArch64::FPR16RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
6280 return fastEmitInst_rr(AArch64::FDIVHrr, &AArch64::FPR16RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
6368 return fastEmitInst_rr(AArch64::FMAXHrr, &AArch64::FPR16RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
6463 return fastEmitInst_rr(AArch64::FMAXNMHrr, &AArch64::FPR16RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
6558 return fastEmitInst_rr(AArch64::FMINHrr, &AArch64::FPR16RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
6653 return fastEmitInst_rr(AArch64::FMINNMHrr, &AArch64::FPR16RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
6748 return fastEmitInst_rr(AArch64::FMULHrr, &AArch64::FPR16RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
6836 return fastEmitInst_rr(AArch64::FSUBHrr, &AArch64::FPR16RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
7956 return fastEmitInst_ri(AArch64::CPYi16, &AArch64::FPR16RegClass, Op0, Op0IsKill, imm1);
gen/lib/Target/AArch64/AArch64GenRegisterInfo.inc 8194 &AArch64::FPR16RegClass,
lib/Target/AArch64/AArch64AsmPrinter.cpp 600 RC = &AArch64::FPR16RegClass;
lib/Target/AArch64/AArch64FastISel.cpp 3036 RC = &AArch64::FPR16RegClass;
lib/Target/AArch64/AArch64ISelLowering.cpp 138 addRegisterClass(MVT::f16, &AArch64::FPR16RegClass);
146 addRegisterClass(MVT::v8i16, &AArch64::FPR16RegClass);
3212 RC = &AArch64::FPR16RegClass;
5989 return std::make_pair(0U, &AArch64::FPR16RegClass);
lib/Target/AArch64/AArch64InstrInfo.cpp 2693 if (AArch64::FPR16RegClass.contains(DestReg) &&
2694 AArch64::FPR16RegClass.contains(SrcReg)) {
2824 if (AArch64::FPR16RegClass.hasSubClassEq(RC))
2955 if (AArch64::FPR16RegClass.hasSubClassEq(RC))
4285 RC = &AArch64::FPR16RegClass;
4301 RC = &AArch64::FPR16RegClass;
4475 RC = &AArch64::FPR16RegClass;
4491 RC = &AArch64::FPR16RegClass;
4507 RC = &AArch64::FPR16RegClass;
lib/Target/AArch64/AArch64InstructionSelector.cpp 319 return &AArch64::FPR16RegClass;
355 return &AArch64::FPR16RegClass;