reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AArch64/AArch64GenAsmWriter.inc
18158         MRI.getRegClass(AArch64::DDDRegClassID).contains(MI->getOperand(1).getReg()) &&
18184         MRI.getRegClass(AArch64::DDDRegClassID).contains(MI->getOperand(1).getReg()) &&
18197         MRI.getRegClass(AArch64::DDDRegClassID).contains(MI->getOperand(1).getReg()) &&
18223         MRI.getRegClass(AArch64::DDDRegClassID).contains(MI->getOperand(1).getReg()) &&
18809         MRI.getRegClass(AArch64::DDDRegClassID).contains(MI->getOperand(1).getReg()) &&
18835         MRI.getRegClass(AArch64::DDDRegClassID).contains(MI->getOperand(1).getReg()) &&
18848         MRI.getRegClass(AArch64::DDDRegClassID).contains(MI->getOperand(1).getReg()) &&
18874         MRI.getRegClass(AArch64::DDDRegClassID).contains(MI->getOperand(1).getReg()) &&
18926         MRI.getRegClass(AArch64::DDDRegClassID).contains(MI->getOperand(1).getReg()) &&
18939         MRI.getRegClass(AArch64::DDDRegClassID).contains(MI->getOperand(1).getReg()) &&
18965         MRI.getRegClass(AArch64::DDDRegClassID).contains(MI->getOperand(1).getReg()) &&
23906         MRI.getRegClass(AArch64::DDDRegClassID).contains(MI->getOperand(1).getReg()) &&
23932         MRI.getRegClass(AArch64::DDDRegClassID).contains(MI->getOperand(1).getReg()) &&
23945         MRI.getRegClass(AArch64::DDDRegClassID).contains(MI->getOperand(1).getReg()) &&
23971         MRI.getRegClass(AArch64::DDDRegClassID).contains(MI->getOperand(1).getReg()) &&
24480         MRI.getRegClass(AArch64::DDDRegClassID).contains(MI->getOperand(1).getReg()) &&
24493         MRI.getRegClass(AArch64::DDDRegClassID).contains(MI->getOperand(1).getReg()) &&
24519         MRI.getRegClass(AArch64::DDDRegClassID).contains(MI->getOperand(1).getReg()) &&
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc
18874         MRI.getRegClass(AArch64::DDDRegClassID).contains(MI->getOperand(1).getReg()) &&
18900         MRI.getRegClass(AArch64::DDDRegClassID).contains(MI->getOperand(1).getReg()) &&
18913         MRI.getRegClass(AArch64::DDDRegClassID).contains(MI->getOperand(1).getReg()) &&
18939         MRI.getRegClass(AArch64::DDDRegClassID).contains(MI->getOperand(1).getReg()) &&
19525         MRI.getRegClass(AArch64::DDDRegClassID).contains(MI->getOperand(1).getReg()) &&
19551         MRI.getRegClass(AArch64::DDDRegClassID).contains(MI->getOperand(1).getReg()) &&
19564         MRI.getRegClass(AArch64::DDDRegClassID).contains(MI->getOperand(1).getReg()) &&
19590         MRI.getRegClass(AArch64::DDDRegClassID).contains(MI->getOperand(1).getReg()) &&
19642         MRI.getRegClass(AArch64::DDDRegClassID).contains(MI->getOperand(1).getReg()) &&
19655         MRI.getRegClass(AArch64::DDDRegClassID).contains(MI->getOperand(1).getReg()) &&
19681         MRI.getRegClass(AArch64::DDDRegClassID).contains(MI->getOperand(1).getReg()) &&
24622         MRI.getRegClass(AArch64::DDDRegClassID).contains(MI->getOperand(1).getReg()) &&
24648         MRI.getRegClass(AArch64::DDDRegClassID).contains(MI->getOperand(1).getReg()) &&
24661         MRI.getRegClass(AArch64::DDDRegClassID).contains(MI->getOperand(1).getReg()) &&
24687         MRI.getRegClass(AArch64::DDDRegClassID).contains(MI->getOperand(1).getReg()) &&
25196         MRI.getRegClass(AArch64::DDDRegClassID).contains(MI->getOperand(1).getReg()) &&
25209         MRI.getRegClass(AArch64::DDDRegClassID).contains(MI->getOperand(1).getReg()) &&
25235         MRI.getRegClass(AArch64::DDDRegClassID).contains(MI->getOperand(1).getReg()) &&
gen/lib/Target/AArch64/AArch64GenInstrInfo.inc
 6669 static const MCOperandInfo OperandInfo268[] = { { AArch64::DDDRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
 6670 static const MCOperandInfo OperandInfo269[] = { { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::DDDRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
gen/lib/Target/AArch64/AArch64GenRegisterBank.inc
   58     (1u << (AArch64::DDDRegClassID - 32)) |
gen/lib/Target/AArch64/AArch64GenRegisterInfo.inc
 3480   { DDD, DDDBits, 271, 32, sizeof(DDDBits), AArch64::DDDRegClassID, 1, true },
 7410     &AArch64MCRegisterClasses[DDDRegClassID],
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
 1083       AArch64::DDRegClassID, AArch64::DDDRegClassID, AArch64::DDDDRegClassID};
lib/Target/AArch64/AArch64RegisterBankInfo.cpp
  235   case AArch64::DDDRegClassID:
lib/Target/AArch64/AArch64RegisterInfo.cpp
  565   case AArch64::DDDRegClassID:
lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
 1265   else if (MRI.getRegClass(AArch64::DDDRegClassID).contains(Reg) ||