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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc16447 { 3314 /* lsr */, AArch64::LSRVXr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, },
16472 { 3323 /* lsrv */, AArch64::LSRVXr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, },
23805 { 3314 /* lsr */, AArch64::LSRVXr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, },
23830 { 3323 /* lsrv */, AArch64::LSRVXr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, },
gen/lib/Target/AArch64/AArch64GenDAGISel.inc95211 /*215988*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::LSRVXr), 0,
95239 /*216049*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::LSRVXr), 0,
95249 /*216066*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::LSRVXr), 0,
gen/lib/Target/AArch64/AArch64GenFastISel.inc 7326 return fastEmitInst_rr(AArch64::LSRVXr, &AArch64::GPR64RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
gen/lib/Target/AArch64/AArch64GenGlobalISel.inc37766 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LSRVXr,
37790 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LSRVXr,
37802 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::LSRVXr,
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc 8636 case AArch64::LSRVXr:
lib/Target/AArch64/AArch64FastISel.cpp 4195 case MVT::i64: Opc = AArch64::LSRVXr; break;
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp 2504 Opc = (VT == MVT::i32) ? AArch64::LSRVWr : AArch64::LSRVXr;
lib/Target/AArch64/AArch64InstructionSelector.cpp 470 return AArch64::LSRVXr;