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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc16420 { 3300 /* lsl */, AArch64::LSLVXr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, },
16444 { 3309 /* lslv */, AArch64::LSLVXr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, },
23778 { 3300 /* lsl */, AArch64::LSLVXr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, },
23802 { 3309 /* lslv */, AArch64::LSLVXr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, },
gen/lib/Target/AArch64/AArch64GenDAGISel.inc94930 /*215464*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::LSLVXr), 0,
94958 /*215525*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::LSLVXr), 0,
94968 /*215542*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::LSLVXr), 0,
gen/lib/Target/AArch64/AArch64GenFastISel.inc 7160 return fastEmitInst_rr(AArch64::LSLVXr, &AArch64::GPR64RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
gen/lib/Target/AArch64/AArch64GenGlobalISel.inc37602 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LSLVXr,
37626 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LSLVXr,
37638 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::LSLVXr,
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc 8634 case AArch64::LSLVXr:
lib/Target/AArch64/AArch64FastISel.cpp 4089 case MVT::i64: Opc = AArch64::LSLVXr; break;
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp 2501 Opc = (VT == MVT::i32) ? AArch64::LSLVWr : AArch64::LSLVXr;
lib/Target/AArch64/AArch64InstructionSelector.cpp 468 return AArch64::LSLVXr;