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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc16230 { 2666 /* ldrb */, AArch64::LDRBBui, Convert__Reg1_0__Reg1_2__imm_95_0, AMFBS_None, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
16234 { 2666 /* ldrb */, AArch64::LDRBBui, Convert__Reg1_0__Reg1_2__UImm12Offset11_3, AMFBS_None, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset1, MCK__93_ }, },
23588 { 2666 /* ldrb */, AArch64::LDRBBui, Convert__Reg1_0__Reg1_2__imm_95_0, AMFBS_None, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
23592 { 2666 /* ldrb */, AArch64::LDRBBui, Convert__Reg1_0__Reg1_2__UImm12Offset11_3, AMFBS_None, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset1, MCK__93_ }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc20767 case AArch64::LDRBBui:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc21483 case AArch64::LDRBBui:
gen/lib/Target/AArch64/AArch64GenDAGISel.inc83954 /*194631*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::LDRBBui), 0|OPFL_Chain|OPFL_MemRefs,
84101 /*194911*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::LDRBBui), 0|OPFL_Chain|OPFL_MemRefs,
84120 /*194947*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::LDRBBui), 0|OPFL_Chain|OPFL_MemRefs,
84128 /*194962*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::LDRBBui), 0|OPFL_Chain|OPFL_MemRefs,
84191 /*195083*/ OPC_EmitNode1, TARGET_VAL(AArch64::LDRBBui), 0|OPFL_Chain|OPFL_MemRefs,
84215 /*195143*/ OPC_EmitNode1, TARGET_VAL(AArch64::LDRBBui), 0|OPFL_Chain|OPFL_MemRefs,
84256 /*195241*/ OPC_EmitNode1, TARGET_VAL(AArch64::LDRBBui), 0|OPFL_Chain|OPFL_MemRefs,
84268 /*195271*/ OPC_EmitNode1, TARGET_VAL(AArch64::LDRBBui), 0|OPFL_Chain|OPFL_MemRefs,
92118 /*209931*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::LDRBBui), 0|OPFL_Chain|OPFL_MemRefs,
gen/lib/Target/AArch64/AArch64GenGlobalISel.inc13524 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRBBui,
13650 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRBBui,
13668 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRBBui,
14208 GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::LDRBBui,
14234 GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::LDRBBui,
15435 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRBBui,
15486 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRBBui,
15661 GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::LDRBBui,
15711 GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::LDRBBui,
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc11832 case AArch64::LDRBBui:
lib/Target/AArch64/AArch64AsmPrinter.cpp 379 OutStreamer->EmitInstruction(MCInstBuilder(AArch64::LDRBBui)
lib/Target/AArch64/AArch64FalkorHWPFFix.cpp 498 case AArch64::LDRBBui:
lib/Target/AArch64/AArch64FastISel.cpp 1830 { AArch64::LDRBBui, AArch64::LDRHHui, AArch64::LDRWui,
1832 { AArch64::LDRBBui, AArch64::LDRHHui, AArch64::LDRWui,
4483 case AArch64::LDRBBui:
lib/Target/AArch64/AArch64InstrInfo.cpp 1753 case AArch64::LDRBBui: return AArch64::LDURBBi;
2178 case AArch64::LDRBBui:
lib/Target/AArch64/AArch64InstructionSelector.cpp 526 return isStore ? AArch64::STRBBui : AArch64::LDRBBui;
lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp 223 case AArch64::LDRBBui:
388 case AArch64::LDRBBui:
439 case AArch64::LDRBBui:
516 case AArch64::LDRBBui:
647 case AArch64::LDRBBui:
679 case AArch64::LDRBBui:
lib/Target/AArch64/AArch64MacroFusion.cpp 200 case AArch64::LDRBBui:
lib/Target/AArch64/AArch64StackTaggingPreRA.cpp 104 case AArch64::LDRBBui:
lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp 1046 case AArch64::LDRBBui: