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References

gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc
14676   { 1825 /* ins */, AArch64::INSvi8lane, Convert__VectorReg1281_0__Tie0_1_1__IndexRange0_151_2__VectorReg1281_3__IndexRange0_151_5, AMFBS_HasNEON, { MCK_VectorReg128, MCK__DOT_b, MCK_IndexRange0_15, MCK_VectorReg128, MCK__DOT_b, MCK_IndexRange0_15 }, },
16600   { 3356 /* mov */, AArch64::INSvi8lane, Convert__VectorReg1281_0__Tie0_1_1__IndexRange0_151_2__VectorReg1281_3__IndexRange0_151_5, AMFBS_HasNEON, { MCK_VectorReg128, MCK__DOT_b, MCK_IndexRange0_15, MCK_VectorReg128, MCK__DOT_b, MCK_IndexRange0_15 }, },
22034   { 1825 /* ins */, AArch64::INSvi8lane, Convert__VectorReg1281_1__Tie0_2_2__IndexRange0_151_2__VectorReg1281_3__IndexRange0_151_4, AMFBS_HasNEON, { MCK__DOT_b, MCK_VectorReg128, MCK_IndexRange0_15, MCK_VectorReg128, MCK_IndexRange0_15 }, },
23936   { 3356 /* mov */, AArch64::INSvi8lane, Convert__VectorReg1281_1__Tie0_2_2__IndexRange0_151_2__VectorReg1281_3__IndexRange0_151_4, AMFBS_HasNEON, { MCK__DOT_b, MCK_VectorReg128, MCK_IndexRange0_15, MCK_VectorReg128, MCK_IndexRange0_15 }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc
17250   case AArch64::INSvi8lane:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc
17966   case AArch64::INSvi8lane:
gen/lib/Target/AArch64/AArch64GenDAGISel.inc
80351 /*187718*/        OPC_MorphNodeTo1, TARGET_VAL(AArch64::INSvi8lane), 0,
109526 /*244703*/          OPC_MorphNodeTo1, TARGET_VAL(AArch64::INSvi8lane), 0,
gen/lib/Target/AArch64/AArch64GenGlobalISel.inc
35829         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::INSvi8lane,
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc
10953     case AArch64::INSvi8lane: {
lib/Target/AArch64/AArch64InstructionSelector.cpp
 3126       Opc = AArch64::INSvi8lane;