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reference to multiple definitions → definitions
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References

gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc
12943   { 292 /* bics */, AArch64::BICSWrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, },
12947   { 292 /* bics */, AArch64::BICSWrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter321_3, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, },
20301   { 292 /* bics */, AArch64::BICSWrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, },
20305   { 292 /* bics */, AArch64::BICSWrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter321_3, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc
15312   case AArch64::BICSWrs:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc
16028   case AArch64::BICSWrs:
gen/lib/Target/AArch64/AArch64GenDAGISel.inc
88112 /*202830*/        OPC_MorphNodeTo2, TARGET_VAL(AArch64::BICSWrs), 0,
88132 /*202881*/        OPC_MorphNodeTo2, TARGET_VAL(AArch64::BICSWrs), 0,
gen/lib/Target/AArch64/AArch64GenInstrInfo.inc
18098   case AArch64::BICSWrs:
18155   case AArch64::BICSWrs:
18384   case AArch64::BICSWrs:
29836   case AArch64::BICSWrs:
29893   case AArch64::BICSWrs:
30122   case AArch64::BICSWrs:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc
15462     case AArch64::BICSWrs:
lib/Target/AArch64/AArch64CondBrTuning.cpp
  177   case AArch64::BICSWrs:
lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
  454     case AArch64::BICSWrr:     Opcode = AArch64::BICSWrs; break;
lib/Target/AArch64/AArch64InstrInfo.cpp
 1869     return AArch64::BICSWrs;
lib/Target/AArch64/AArch64MacroFusion.cpp
   54   case AArch64::BICSWrs:
lib/Target/AArch64/AArch64RedundantCopyElimination.cpp
  240     case AArch64::BICSWrs:
lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
  957   case AArch64::BICSWrs: