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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc12831 { 124 /* ands */, AArch64::ANDSWrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, },
12835 { 124 /* ands */, AArch64::ANDSWrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter321_3, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, },
19163 { 6158 /* tst */, AArch64::ANDSWrs, Convert__regWZR__Reg1_0__Reg1_1__imm_95_0, AMFBS_None, { MCK_GPR32, MCK_GPR32 }, },
19167 { 6158 /* tst */, AArch64::ANDSWrs, Convert__regWZR__Reg1_0__Reg1_1__LogicalShifter321_2, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, },
20189 { 124 /* ands */, AArch64::ANDSWrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, },
20193 { 124 /* ands */, AArch64::ANDSWrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter321_3, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, },
26521 { 6158 /* tst */, AArch64::ANDSWrs, Convert__regWZR__Reg1_0__Reg1_1__imm_95_0, AMFBS_None, { MCK_GPR32, MCK_GPR32 }, },
26525 { 6158 /* tst */, AArch64::ANDSWrs, Convert__regWZR__Reg1_0__Reg1_1__LogicalShifter321_2, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc15137 case AArch64::ANDSWrs:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc15853 case AArch64::ANDSWrs:
gen/lib/Target/AArch64/AArch64GenDAGISel.inc88150 /*202920*/ OPC_MorphNodeTo2, TARGET_VAL(AArch64::ANDSWrs), 0,
88156 /*202934*/ OPC_MorphNodeTo2, TARGET_VAL(AArch64::ANDSWrs), 0,
gen/lib/Target/AArch64/AArch64GenInstrInfo.inc18094 case AArch64::ANDSWrs:
18151 case AArch64::ANDSWrs:
18380 case AArch64::ANDSWrs:
29832 case AArch64::ANDSWrs:
29889 case AArch64::ANDSWrs:
30118 case AArch64::ANDSWrs:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc15458 case AArch64::ANDSWrs:
lib/Target/AArch64/AArch64CondBrTuning.cpp 175 case AArch64::ANDSWrs:
lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp 452 case AArch64::ANDSWrr: Opcode = AArch64::ANDSWrs; break;
lib/Target/AArch64/AArch64InstrInfo.cpp 1863 return AArch64::ANDSWrs;
lib/Target/AArch64/AArch64MacroFusion.cpp 50 case AArch64::ANDSWrs:
lib/Target/AArch64/AArch64RedundantCopyElimination.cpp 235 case AArch64::ANDSWrs:
lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp 955 case AArch64::ANDSWrs: