reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
65956 /*160534*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::ADDXrr), 0,
gen/lib/Target/AArch64/AArch64GenFastISel.inc 5963 return fastEmitInst_rr(AArch64::ADDXrr, &AArch64::GPR64RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
gen/lib/Target/AArch64/AArch64GenGlobalISel.inc 1760 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ADDXrr,
gen/lib/Target/AArch64/AArch64GenInstrInfo.inc18051 case AArch64::ADDXrr: 29789 case AArch64::ADDXrr:gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc
5407 case AArch64::ADDXrr:
lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp 169 case AArch64::ADDXrr:
lib/Target/AArch64/AArch64CondBrTuning.cpp 215 case AArch64::ADDXrr:
lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp414 case AArch64::ADDXrr: 442 case AArch64::ADDXrr: Opcode = AArch64::ADDXrs; break;lib/Target/AArch64/AArch64FastISel.cpp
1329 { AArch64::ADDWrr, AArch64::ADDXrr } },
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp 2860 SDNode *N2 = CurDAG->getMachineNode(AArch64::ADDXrr, DL, MVT::i64,
lib/Target/AArch64/AArch64InstrInfo.cpp1107 return AArch64::ADDXrr; 1245 case AArch64::ADDXrr: 1886 case AArch64::ADDXrr: 3542 case AArch64::ADDXrr: 3704 case AArch64::ADDXrr:lib/Target/AArch64/AArch64InstructionSelector.cpp
466 return AArch64::ADDXrr; 3150 static const unsigned OpcTable[2][2]{{AArch64::ADDXrr, AArch64::ADDXri},lib/Target/AArch64/AArch64MacroFusion.cpp
80 case AArch64::ADDXrr: 281 case AArch64::ADDXrr: 320 case AArch64::ADDXrr: 356 case AArch64::ADDXrr: