Search results for getCopyToReg.*getEntryNode

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lib/Target/AArch64/AArch64ISelLowering.cpp

 3357 
 3358         SDValue Copy = DAG.getCopyToReg(DAG.getEntryNode(), DL, Reg, InVals[I]);
 3359         Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Copy, Chain);

lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp

 1123   // V_DIV_FMAS implicitly reads VCC.
 1124   SDValue VCC = CurDAG->getCopyToReg(CurDAG->getEntryNode(), SL,
 1125                                      TRI->getVCC(), CarryIn, SDValue());

lib/Target/AMDGPU/SIISelLowering.cpp

 5872   case Intrinsic::amdgcn_interp_p1_f16: {
 5873     SDValue ToM0 = DAG.getCopyToReg(DAG.getEntryNode(), DL, AMDGPU::M0,
 5874                                     Op.getOperand(5), SDValue());

lib/Target/AMDGPU/SIISelLowering.cpp

 5914   case Intrinsic::amdgcn_interp_p2_f16: {
 5915     SDValue ToM0 = DAG.getCopyToReg(DAG.getEntryNode(), DL, AMDGPU::M0,
 5916                                     Op.getOperand(6), SDValue());

lib/Target/AMDGPU/SIISelLowering.cpp

10330 
10331     SDValue ImpDef = DAG.getCopyToReg(DAG.getEntryNode(), SDLoc(Node),
10332                                       UndefReg, Src0, SDValue());

lib/Target/ARM/ARMISelLowering.cpp

 4282                                 DAG.getConstant(ShiftAmt, dl, MVT::i32));
 4283     SDValue Chain = DAG.getCopyToReg(DAG.getEntryNode(), dl, ARM::CPSR,
 4284                                      Shift.getValue(1), SDValue());

lib/Target/ARM/ARMISelLowering.cpp

 6359   SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32);
 6360   SDValue Chain = DAG.getCopyToReg(DAG.getEntryNode(), DL, ARM::CPSR,
 6361                                    Cmp.getValue(1), SDValue());

lib/Target/ARM/ARMISelLowering.cpp

14344           DAG.getNode(ARMISD::SUBS, dl, DAG.getVTList(VT, MVT::i32), LHS, RHS);
14345       SDValue CPSRGlue = DAG.getCopyToReg(DAG.getEntryNode(), dl, ARM::CPSR,
14346                                           Sub.getValue(1), SDValue());

lib/Target/ARM/ARMISelLowering.cpp

14358           DAG.getNode(ARMISD::SUBS, dl, DAG.getVTList(VT, MVT::i32), LHS, RHS);
14359       SDValue CPSRGlue = DAG.getCopyToReg(DAG.getEntryNode(), dl, ARM::CPSR,
14360                                           Sub.getValue(1), SDValue());

lib/Target/Hexagon/HexagonISelLowering.cpp

 1193   SDValue InFlag;
 1194   Chain = DAG.getCopyToReg(DAG.getEntryNode(), dl, Hexagon::R0, Chain, InFlag);
 1195   InFlag = Chain.getValue(1);

lib/Target/Lanai/LanaiISelLowering.cpp

  518     }
  519     SDValue Copy = DAG.getCopyToReg(DAG.getEntryNode(), DL, Reg, InVals[0]);
  520     Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Copy, Chain);

lib/Target/MSP430/MSP430ISelLowering.cpp

  698       }
  699       SDValue Copy = DAG.getCopyToReg(DAG.getEntryNode(), dl, Reg, InVals[i]);
  700       Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Copy, Chain);

lib/Target/Mips/MipsISelLowering.cpp

 3594       }
 3595       SDValue Copy = DAG.getCopyToReg(DAG.getEntryNode(), DL, Reg, InVals[i]);
 3596       Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Copy, Chain);

lib/Target/Mips/MipsSEISelDAGToDAG.cpp

  957                                CurDAG->getTargetConstant(0, DL, MVT::i32));
  958     SDValue Chain = CurDAG->getCopyToReg(CurDAG->getEntryNode(), DL, DestReg,
  959                                          SDValue(Rdhwr, 0));

lib/Target/PowerPC/PPCISelDAGToDAG.cpp

 4143   SDValue InFlag(nullptr, 0);  // Null incoming flag value.
 4144   CCReg = CurDAG->getCopyToReg(CurDAG->getEntryNode(), dl, CR7Reg, CCReg,
 4145                                InFlag).getValue(1);

lib/Target/Sparc/SparcISelDAGToDAG.cpp

  358     }
  359     TopPart = CurDAG->getCopyToReg(CurDAG->getEntryNode(), dl, SP::Y, TopPart,
  360                                    SDValue())

lib/Target/Sparc/SparcISelLowering.cpp

  529     }
  530     SDValue Copy = DAG.getCopyToReg(DAG.getEntryNode(), dl, Reg, InVals[0]);
  531     Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Copy, Chain);