1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
| import("//llvm/utils/TableGen/tablegen.gni")
tablegen("ARMGenAsmWriter") {
visibility = [ ":MCTargetDesc" ]
args = [ "-gen-asm-writer" ]
td_file = "../ARM.td"
}
tablegen("ARMGenInstrInfo") {
visibility = [ ":tablegen" ]
args = [ "-gen-instr-info" ]
td_file = "../ARM.td"
}
tablegen("ARMGenMCCodeEmitter") {
visibility = [ ":MCTargetDesc" ]
args = [ "-gen-emitter" ]
td_file = "../ARM.td"
}
tablegen("ARMGenRegisterInfo") {
visibility = [ ":tablegen" ]
args = [ "-gen-register-info" ]
td_file = "../ARM.td"
}
tablegen("ARMGenSubtargetInfo") {
visibility = [ ":tablegen" ]
args = [ "-gen-subtarget" ]
td_file = "../ARM.td"
}
# This should contain tablegen targets generating .inc files included
# by other targets. .inc files only used by .cpp files in this directory
# should be in deps on the static_library instead.
group("tablegen") {
visibility = [
":MCTargetDesc",
"../Utils",
]
public_deps = [
":ARMGenInstrInfo",
":ARMGenRegisterInfo",
":ARMGenSubtargetInfo",
]
}
static_library("MCTargetDesc") {
output_name = "LLVMARMDesc"
public_deps = [
":tablegen",
]
deps = [
":ARMGenAsmWriter",
":ARMGenMCCodeEmitter",
"//llvm/lib/MC",
"//llvm/lib/MC/MCDisassembler",
"//llvm/lib/Support",
"//llvm/lib/Target/ARM/TargetInfo",
"//llvm/lib/Target/ARM/Utils",
]
include_dirs = [ ".." ]
sources = [
"ARMAsmBackend.cpp",
"ARMELFObjectWriter.cpp",
"ARMELFStreamer.cpp",
"ARMInstPrinter.cpp",
"ARMMCAsmInfo.cpp",
"ARMMCCodeEmitter.cpp",
"ARMMCExpr.cpp",
"ARMMCTargetDesc.cpp",
"ARMMachORelocationInfo.cpp",
"ARMMachObjectWriter.cpp",
"ARMTargetStreamer.cpp",
"ARMUnwindOpAsm.cpp",
"ARMWinCOFFObjectWriter.cpp",
"ARMWinCOFFStreamer.cpp",
]
}
|