reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

utils/TableGen/SubtargetEmitter.cpp
 1342     if (PM.hasExtraProcessorInfo())
 1343       EmitExtraProcessorInfo(PM, OS);
 1345     if (PM.hasInstrSchedModel())
 1346       EmitProcessorResources(PM, OS);
 1347     else if(!PM.ProcResourceDefs.empty())
 1348       PrintFatalError(PM.ModelDef->getLoc(), "SchedMachineModel defines "
 1353     OS << "static const llvm::MCSchedModel " << PM.ModelName << " = {\n";
 1354     EmitProcessorProp(OS, PM.ModelDef, "IssueWidth", ',');
 1355     EmitProcessorProp(OS, PM.ModelDef, "MicroOpBufferSize", ',');
 1356     EmitProcessorProp(OS, PM.ModelDef, "LoopMicroOpBufferSize", ',');
 1357     EmitProcessorProp(OS, PM.ModelDef, "LoadLatency", ',');
 1358     EmitProcessorProp(OS, PM.ModelDef, "HighLatency", ',');
 1359     EmitProcessorProp(OS, PM.ModelDef, "MispredictPenalty", ',');
 1362       (PM.ModelDef ? PM.ModelDef->getValueAsBit("PostRAScheduler") : false);
 1362       (PM.ModelDef ? PM.ModelDef->getValueAsBit("PostRAScheduler") : false);
 1368       (PM.ModelDef ? PM.ModelDef->getValueAsBit("CompleteModel") : false);
 1368       (PM.ModelDef ? PM.ModelDef->getValueAsBit("CompleteModel") : false);
 1373     OS << "  " << PM.Index << ", // Processor ID\n";
 1374     if (PM.hasInstrSchedModel())
 1375       OS << "  " << PM.ModelName << "ProcResources" << ",\n"
 1376          << "  " << PM.ModelName << "SchedClasses" << ",\n"
 1377          << "  " << PM.ProcResourceDefs.size()+1 << ",\n"
 1383     if (PM.hasItineraries())
 1384       OS << "  " << PM.ItinsDef->getName() << ",\n";
 1387     if (PM.hasExtraProcessorInfo())
 1388       OS << "  &" << PM.ModelName << "ExtraInfo,\n";