reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
865 emitSourceFileHeader("MC Register Information", OS); 867 OS << "\n#ifdef GET_REGINFO_MC_DESC\n"; 868 OS << "#undef GET_REGINFO_MC_DESC\n\n"; 964 OS << "namespace llvm {\n\n"; 969 OS << "extern const MCPhysReg " << TargetName << "RegDiffLists[] = {\n"; 970 DiffSeqs.emit(OS, printDiff16); 971 OS << "};\n\n"; 974 OS << "extern const LaneBitmask " << TargetName << "LaneMaskLists[] = {\n"; 975 LaneMaskSeqs.emit(OS, printMask, "LaneBitmask::getAll()"); 976 OS << "};\n\n"; 979 OS << "extern const uint16_t " << TargetName << "SubRegIdxLists[] = {\n"; 980 SubRegIdxSeqs.emit(OS, printSubRegIndex); 981 OS << "};\n\n"; 984 OS << "extern const MCRegisterInfo::SubRegCoveredBits " 986 OS << " { " << (uint16_t)-1 << ", " << (uint16_t)-1 << " },\n"; 988 OS << " { " << Idx.Offset << ", " << Idx.Size << " },\t// " 991 OS << "};\n\n"; 995 OS << "extern const char " << TargetName << "RegStrings[] = {\n"; 996 RegStrings.emit(OS, printChar); 997 OS << "};\n\n"; 999 OS << "extern const MCRegisterDesc " << TargetName 1001 OS << " { " << RegStrings.get("") << ", 0, 0, 0, 0, 0 },\n"; 1006 OS << " { " << RegStrings.get(Reg.getName()) << ", " 1013 OS << "};\n\n"; // End of register descriptors... 1017 OS << "extern const MCPhysReg " << TargetName << "RegUnitRoots[][2] = {\n"; 1022 OS << " { " << getQualifiedName(Roots.front()->TheDef); 1024 OS << ", " << getQualifiedName(Roots[r]->TheDef); 1025 OS << " },\n"; 1027 OS << "};\n\n"; 1032 OS << "namespace { // Register classes...\n"; 1046 OS << " // " << Name << " Register Class...\n" 1050 OS << getQualifiedName(Reg) << ", "; 1052 OS << "\n };\n\n"; 1054 OS << " // " << Name << " Bit set.\n" 1061 BVE.print(OS); 1062 OS << "\n };\n\n"; 1065 OS << "} // end anonymous namespace\n\n"; 1068 OS << "extern const char " << TargetName << "RegClassStrings[] = {\n"; 1069 RegClassStrings.emit(OS, printChar); 1070 OS << "};\n\n"; 1072 OS << "extern const MCRegisterClass " << TargetName 1077 OS << " { " << RC.getName() << ", " << RC.getName() << "Bits, " 1085 OS << "};\n\n"; 1087 EmitRegMappingTables(OS, Regs, false); 1090 OS << "extern const uint16_t " << TargetName; 1091 OS << "RegEncodingTable[] = {\n"; 1093 OS << " 0,\n"; 1102 OS << " " << Value << ",\n"; 1104 OS << "};\n"; // End of HW encoding table 1107 OS << "static inline void Init" << TargetName 1121 EmitRegMapping(OS, Regs, false); 1123 OS << "}\n\n"; 1125 OS << "} // end namespace llvm\n\n"; 1126 OS << "#endif // GET_REGINFO_MC_DESC\n\n";