reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
793 RSI = RegSizeInfoByHwMode(DI->getDef(), RegBank.getHwModes()); 795 assert((RSI.hasDefault() || Size != 0 || VTs[0].isSimple()) && 797 if (!RSI.hasDefault()) { 802 RSI.Map.insert({DefaultMode, RI}); 896 return A->RSI.isSubClassOf(B->RSI) && 896 return A->RSI.isSubClassOf(B->RSI) && 915 if (A->RSI < B->RSI) 915 if (A->RSI < B->RSI) 917 if (A->RSI != B->RSI) 917 if (A->RSI != B->RSI) 1251 CodeGenRegisterClass::Key K(Members, RC->RSI); 2154 if (RC2->RSI.hasStricterSpillThan(RC1->RSI)) 2154 if (RC2->RSI.hasStricterSpillThan(RC1->RSI))utils/TableGen/CodeGenRegisters.h
457 : Members(&RC.getMembers()), RSI(RC.RSI) {}
utils/TableGen/RegisterBankEmitter.cpp87 else if (RCWithLargestRegsSize->RSI.get(DefaultMode).SpillSize < 88 RC->RSI.get(DefaultMode).SpillSize) 246 unsigned Size = RC.RSI.get(DefaultMode).SpillSize;utils/TableGen/RegisterInfoEmitter.cpp
1281 const RegSizeInfo &RI = RC.RSI.get(M); 1629 OS << ' ' << getModeName(M) << ':' << RC.RSI.get(M).SpillSize; 1632 OS << ' ' << getModeName(M) << ':' << RC.RSI.get(M).SpillAlignment;