reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
606 row_sp = unwind_plan.GetRowForFunctionOffset(28); 607 EXPECT_EQ(28ull, row_sp->GetOffset()); 608 EXPECT_TRUE(row_sp->GetCFAValue().GetRegisterNumber() == gpr_fp_arm64); 609 EXPECT_TRUE(row_sp->GetCFAValue().IsRegisterPlusOffset() == true); 610 EXPECT_EQ(16, row_sp->GetCFAValue().GetOffset()); 612 EXPECT_TRUE(row_sp->GetRegisterInfo(fpu_d15_arm64, regloc)); 616 EXPECT_TRUE(row_sp->GetRegisterInfo(fpu_d14_arm64, regloc)); 620 EXPECT_TRUE(row_sp->GetRegisterInfo(fpu_d13_arm64, regloc)); 624 EXPECT_TRUE(row_sp->GetRegisterInfo(fpu_d12_arm64, regloc)); 628 EXPECT_TRUE(row_sp->GetRegisterInfo(fpu_d11_arm64, regloc)); 632 EXPECT_TRUE(row_sp->GetRegisterInfo(fpu_d10_arm64, regloc)); 636 EXPECT_TRUE(row_sp->GetRegisterInfo(fpu_d9_arm64, regloc)); 640 EXPECT_TRUE(row_sp->GetRegisterInfo(fpu_d8_arm64, regloc)); 645 row_sp = unwind_plan.GetRowForFunctionOffset(60); 646 EXPECT_EQ(60ull, row_sp->GetOffset()); 647 EXPECT_TRUE(row_sp->GetCFAValue().GetRegisterNumber() == gpr_sp_arm64); 648 EXPECT_TRUE(row_sp->GetCFAValue().IsRegisterPlusOffset() == true); 649 EXPECT_EQ(0, row_sp->GetCFAValue().GetOffset()); 651 if (row_sp->GetRegisterInfo(fpu_d8_arm64, regloc)) { 654 if (row_sp->GetRegisterInfo(fpu_d9_arm64, regloc)) { 657 if (row_sp->GetRegisterInfo(fpu_d10_arm64, regloc)) { 660 if (row_sp->GetRegisterInfo(fpu_d11_arm64, regloc)) { 663 if (row_sp->GetRegisterInfo(fpu_d12_arm64, regloc)) { 666 if (row_sp->GetRegisterInfo(fpu_d13_arm64, regloc)) { 669 if (row_sp->GetRegisterInfo(fpu_d14_arm64, regloc)) { 672 if (row_sp->GetRegisterInfo(fpu_d15_arm64, regloc)) { 675 if (row_sp->GetRegisterInfo(gpr_x27_arm64, regloc)) { 678 if (row_sp->GetRegisterInfo(gpr_x28_arm64, regloc)) {