1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
| // RUN: %clang_cc1 %s -triple spir-unknown-unknown -cl-std=CL1.2 -cl-ext=+cl_intel_device_side_avc_motion_estimation -emit-llvm -o - -O0 | FileCheck %s
// CHECK: %opencl.intel_sub_group_avc_mce_payload_t = type opaque
// CHECK: %opencl.intel_sub_group_avc_ime_payload_t = type opaque
// CHECK: %opencl.intel_sub_group_avc_ref_payload_t = type opaque
// CHECK: %opencl.intel_sub_group_avc_sic_payload_t = type opaque
// CHECK: %opencl.intel_sub_group_avc_mce_result_t = type opaque
// CHECK: %opencl.intel_sub_group_avc_ime_result_t = type opaque
// CHECK: %opencl.intel_sub_group_avc_ref_result_t = type opaque
// CHECK: %opencl.intel_sub_group_avc_sic_result_t = type opaque
// CHECK: %opencl.intel_sub_group_avc_ime_result_single_reference_streamout_t = type opaque
// CHECK: %opencl.intel_sub_group_avc_ime_result_dual_reference_streamout_t = type opaque
// CHECK: %opencl.intel_sub_group_avc_ime_single_reference_streamin_t = type opaque
// CHECK: %opencl.intel_sub_group_avc_ime_dual_reference_streamin_t = type opaque
// CHECK: store %opencl.intel_sub_group_avc_ime_payload_t* null,
// CHECK: store %opencl.intel_sub_group_avc_ref_payload_t* null,
// CHECK: store %opencl.intel_sub_group_avc_sic_payload_t* null,
// CHECK: store %opencl.intel_sub_group_avc_ime_result_t* null,
// CHECK: store %opencl.intel_sub_group_avc_ref_result_t* null,
// CHECK: store %opencl.intel_sub_group_avc_sic_result_t* null,
// CHECK: store %opencl.intel_sub_group_avc_ime_result_single_reference_streamout_t* null,
// CHECK: store %opencl.intel_sub_group_avc_ime_result_dual_reference_streamout_t* null,
// CHECK: store %opencl.intel_sub_group_avc_ime_single_reference_streamin_t* null,
// CHECK: store %opencl.intel_sub_group_avc_ime_dual_reference_streamin_t* null,
//
// CHECK: store %opencl.intel_sub_group_avc_ime_payload_t* null,
// CHECK: store %opencl.intel_sub_group_avc_ref_payload_t* null,
// CHECK: store %opencl.intel_sub_group_avc_sic_payload_t* null,
// CHECK: store %opencl.intel_sub_group_avc_ime_result_t* null,
// CHECK: store %opencl.intel_sub_group_avc_ref_result_t* null,
// CHECK: store %opencl.intel_sub_group_avc_sic_result_t* null,
// CHECK: store %opencl.intel_sub_group_avc_ime_result_single_reference_streamout_t* null,
// CHECK: store %opencl.intel_sub_group_avc_ime_result_dual_reference_streamout_t* null,
// CHECK: store %opencl.intel_sub_group_avc_ime_single_reference_streamin_t* null,
// CHECK: store %opencl.intel_sub_group_avc_ime_dual_reference_streamin_t* null,
#pragma OPENCL EXTENSION cl_intel_device_side_avc_motion_estimation : enable
// Using 0x0 directly allows us not to include opencl-c.h header and not to
// redefine all of these CLK_AVC_*_INTITIALIZE_INTEL macro. '0x0' value must
// be in sync with ones defined in opencl-c.h
void foo() {
intel_sub_group_avc_mce_payload_t payload_mce; // No literal initializer for mce types
intel_sub_group_avc_ime_payload_t payload_ime = 0x0;
intel_sub_group_avc_ref_payload_t payload_ref = 0x0;
intel_sub_group_avc_sic_payload_t payload_sic = 0x0;
intel_sub_group_avc_mce_result_t result_mce; // No literal initializer for mce types
intel_sub_group_avc_ime_result_t result_ime = 0x0;
intel_sub_group_avc_ref_result_t result_ref = 0x0;
intel_sub_group_avc_sic_result_t result_sic = 0x0;
intel_sub_group_avc_ime_result_single_reference_streamout_t sstreamout = 0x0;
intel_sub_group_avc_ime_result_dual_reference_streamout_t dstreamout = 0x0;
intel_sub_group_avc_ime_single_reference_streamin_t sstreamin = 0x0;
intel_sub_group_avc_ime_dual_reference_streamin_t dstreamin = 0x0;
// Initialization with initializer list was supported in the first version
// of the extension. So we check for backward compatibility here.
intel_sub_group_avc_ime_payload_t payload_ime_list = {0};
intel_sub_group_avc_ref_payload_t payload_ref_list = {0};
intel_sub_group_avc_sic_payload_t payload_sic_list = {0};
intel_sub_group_avc_ime_result_t result_ime_list = {0};
intel_sub_group_avc_ref_result_t result_ref_list = {0};
intel_sub_group_avc_sic_result_t result_sic_list = {0};
intel_sub_group_avc_ime_result_single_reference_streamout_t sstreamout_list = {0};
intel_sub_group_avc_ime_result_dual_reference_streamout_t dstreamout_list = {0};
intel_sub_group_avc_ime_single_reference_streamin_t sstreamin_list = {0};
intel_sub_group_avc_ime_dual_reference_streamin_t dstreamin_list = {0};
}
|