reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -basicaa -slp-vectorizer -S -mtriple=i386-apple-macosx10.9.0 -mcpu=corei7-avx | FileCheck %s

target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"

@a = common global i64* null, align 8

; Function Attrs: nounwind ssp uwtable
define i32 @fn1() {
; CHECK-LABEL: @fn1(
; CHECK-NEXT:  entry:
; CHECK-NEXT:    [[TMP0:%.*]] = load i64*, i64** @a, align 8
; CHECK-NEXT:    [[TMP1:%.*]] = insertelement <2 x i64*> undef, i64* [[TMP0]], i32 0
; CHECK-NEXT:    [[TMP2:%.*]] = insertelement <2 x i64*> [[TMP1]], i64* [[TMP0]], i32 1
; CHECK-NEXT:    [[TMP3:%.*]] = getelementptr i64, <2 x i64*> [[TMP2]], <2 x i64> <i64 11, i64 56>
; CHECK-NEXT:    [[TMP4:%.*]] = ptrtoint <2 x i64*> [[TMP3]] to <2 x i64>
; CHECK-NEXT:    [[ARRAYIDX2:%.*]] = getelementptr inbounds i64, i64* [[TMP0]], i64 12
; CHECK-NEXT:    [[TMP5:%.*]] = extractelement <2 x i64*> [[TMP3]], i32 0
; CHECK-NEXT:    [[TMP6:%.*]] = bitcast i64* [[TMP5]] to <2 x i64>*
; CHECK-NEXT:    store <2 x i64> [[TMP4]], <2 x i64>* [[TMP6]], align 8
; CHECK-NEXT:    ret i32 undef
;
entry:
  %0 = load i64*, i64** @a, align 8
  %add.ptr = getelementptr inbounds i64, i64* %0, i64 11
  %1 = ptrtoint i64* %add.ptr to i64
  store i64 %1, i64* %add.ptr, align 8
  %add.ptr1 = getelementptr inbounds i64, i64* %0, i64 56
  %2 = ptrtoint i64* %add.ptr1 to i64
  %arrayidx2 = getelementptr inbounds i64, i64* %0, i64 12
  store i64 %2, i64* %arrayidx2, align 8
  ret i32 undef
}


declare float @llvm.powi.f32(float, i32)
define void @fn2(i32* %a, i32* %b, float* %c) {
; CHECK-LABEL: @fn2(
; CHECK-NEXT:  entry:
; CHECK-NEXT:    [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i32 1
; CHECK-NEXT:    [[ARRAYIDX3:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i32 1
; CHECK-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 2
; CHECK-NEXT:    [[ARRAYIDX5:%.*]] = getelementptr inbounds i32, i32* [[B]], i32 2
; CHECK-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 3
; CHECK-NEXT:    [[TMP0:%.*]] = bitcast i32* [[A]] to <4 x i32>*
; CHECK-NEXT:    [[TMP1:%.*]] = load <4 x i32>, <4 x i32>* [[TMP0]], align 4
; CHECK-NEXT:    [[ARRAYIDX7:%.*]] = getelementptr inbounds i32, i32* [[B]], i32 3
; CHECK-NEXT:    [[TMP2:%.*]] = bitcast i32* [[B]] to <4 x i32>*
; CHECK-NEXT:    [[TMP3:%.*]] = load <4 x i32>, <4 x i32>* [[TMP2]], align 4
; CHECK-NEXT:    [[TMP4:%.*]] = add <4 x i32> [[TMP1]], [[TMP3]]
; CHECK-NEXT:    [[TMP5:%.*]] = sitofp <4 x i32> [[TMP4]] to <4 x float>
; CHECK-NEXT:    [[TMP6:%.*]] = extractelement <4 x i32> [[TMP4]], i32 0
; CHECK-NEXT:    [[TMP7:%.*]] = call <4 x float> @llvm.powi.v4f32(<4 x float> [[TMP5]], i32 [[TMP6]])
; CHECK-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds float, float* [[C:%.*]], i32 1
; CHECK-NEXT:    [[ARRAYIDX9:%.*]] = getelementptr inbounds float, float* [[C]], i32 2
; CHECK-NEXT:    [[ARRAYIDX10:%.*]] = getelementptr inbounds float, float* [[C]], i32 3
; CHECK-NEXT:    [[TMP8:%.*]] = bitcast float* [[C]] to <4 x float>*
; CHECK-NEXT:    store <4 x float> [[TMP7]], <4 x float>* [[TMP8]], align 4
; CHECK-NEXT:    ret void
;
entry:
  %i0 = load i32, i32* %a, align 4
  %i1 = load i32, i32* %b, align 4
  %add1 = add i32 %i0, %i1
  %fp1 = sitofp i32 %add1 to float
  %call1 = tail call float @llvm.powi.f32(float %fp1,i32 %add1) nounwind readnone

  %arrayidx2 = getelementptr inbounds i32, i32* %a, i32 1
  %i2 = load i32, i32* %arrayidx2, align 4
  %arrayidx3 = getelementptr inbounds i32, i32* %b, i32 1
  %i3 = load i32, i32* %arrayidx3, align 4
  %add2 = add i32 %i2, %i3
  %fp2 = sitofp i32 %add2 to float
  %call2 = tail call float @llvm.powi.f32(float %fp2,i32 %add1) nounwind readnone

  %arrayidx4 = getelementptr inbounds i32, i32* %a, i32 2
  %i4 = load i32, i32* %arrayidx4, align 4
  %arrayidx5 = getelementptr inbounds i32, i32* %b, i32 2
  %i5 = load i32, i32* %arrayidx5, align 4
  %add3 = add i32 %i4, %i5
  %fp3 = sitofp i32 %add3 to float
  %call3 = tail call float @llvm.powi.f32(float %fp3,i32 %add1) nounwind readnone

  %arrayidx6 = getelementptr inbounds i32, i32* %a, i32 3
  %i6 = load i32, i32* %arrayidx6, align 4
  %arrayidx7 = getelementptr inbounds i32, i32* %b, i32 3
  %i7 = load i32, i32* %arrayidx7, align 4
  %add4 = add i32 %i6, %i7
  %fp4 = sitofp i32 %add4 to float
  %call4 = tail call float @llvm.powi.f32(float %fp4,i32 %add1) nounwind readnone

  store float %call1, float* %c, align 4
  %arrayidx8 = getelementptr inbounds float, float* %c, i32 1
  store float %call2, float* %arrayidx8, align 4
  %arrayidx9 = getelementptr inbounds float, float* %c, i32 2
  store float %call3, float* %arrayidx9, align 4
  %arrayidx10 = getelementptr inbounds float, float* %c, i32 3
  store float %call4, float* %arrayidx10, align 4
  ret void

}