1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
| ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt %s -instcombine -S | FileCheck %s
; Fold
; (%x - %y) u> %x
; to
; @llvm.sub.with.overflow(%x, %y) + extractvalue
define i1 @t0_basic(i8 %x, i8 %y) {
; CHECK-LABEL: @t0_basic(
; CHECK-NEXT: [[R:%.*]] = icmp ugt i8 [[Y:%.*]], [[X:%.*]]
; CHECK-NEXT: ret i1 [[R]]
;
%t0 = sub i8 %x, %y
%r = icmp ugt i8 %t0, %x
ret i1 %r
}
define <2 x i1> @t1_vec(<2 x i8> %x, <2 x i8> %y) {
; CHECK-LABEL: @t1_vec(
; CHECK-NEXT: [[R:%.*]] = icmp ugt <2 x i8> [[Y:%.*]], [[X:%.*]]
; CHECK-NEXT: ret <2 x i1> [[R]]
;
%t0 = sub <2 x i8> %x, %y
%r = icmp ugt <2 x i8> %t0, %x
ret <2 x i1> %r
}
; Commutativity
define i1 @t2_commutative(i8 %x, i8 %y) {
; CHECK-LABEL: @t2_commutative(
; CHECK-NEXT: [[R:%.*]] = icmp ugt i8 [[Y:%.*]], [[X:%.*]]
; CHECK-NEXT: ret i1 [[R]]
;
%t0 = sub i8 %x, %y
%r = icmp ult i8 %x, %t0 ; swapped
ret i1 %r
}
; Extra-use tests
declare void @use8(i8)
define i1 @t3_extrause0(i8 %x, i8 %y) {
; CHECK-LABEL: @t3_extrause0(
; CHECK-NEXT: [[T0:%.*]] = sub i8 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: call void @use8(i8 [[T0]])
; CHECK-NEXT: [[R:%.*]] = icmp ult i8 [[X]], [[Y]]
; CHECK-NEXT: ret i1 [[R]]
;
%t0 = sub i8 %x, %y
call void @use8(i8 %t0)
%r = icmp ugt i8 %t0, %x
ret i1 %r
}
; Negative tests
define i1 @n4_not_commutative(i8 %x, i8 %y) {
; CHECK-LABEL: @n4_not_commutative(
; CHECK-NEXT: [[T0:%.*]] = sub i8 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: [[R:%.*]] = icmp ugt i8 [[T0]], [[Y]]
; CHECK-NEXT: ret i1 [[R]]
;
%t0 = sub i8 %x, %y
%r = icmp ugt i8 %t0, %y ; can't check against %y.
ret i1 %r
}
define i1 @n5_wrong_pred0(i8 %x, i8 %y) {
; CHECK-LABEL: @n5_wrong_pred0(
; CHECK-NEXT: [[T0:%.*]] = sub i8 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: [[R:%.*]] = icmp uge i8 [[T0]], [[X]]
; CHECK-NEXT: ret i1 [[R]]
;
%t0 = sub i8 %x, %y
%r = icmp uge i8 %t0, %x
ret i1 %r
}
define i1 @n6_wrong_pred1(i8 %x, i8 %y) {
; CHECK-LABEL: @n6_wrong_pred1(
; CHECK-NEXT: [[T0:%.*]] = sub i8 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: [[R:%.*]] = icmp ult i8 [[T0]], [[X]]
; CHECK-NEXT: ret i1 [[R]]
;
%t0 = sub i8 %x, %y
%r = icmp ult i8 %t0, %x
ret i1 %r
}
define i1 @n7_wrong_pred2(i8 %x, i8 %y) {
; CHECK-LABEL: @n7_wrong_pred2(
; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[Y:%.*]], 0
; CHECK-NEXT: ret i1 [[R]]
;
%t0 = sub i8 %x, %y
%r = icmp eq i8 %t0, %x
ret i1 %r
}
define i1 @n8_wrong_pred3(i8 %x, i8 %y) {
; CHECK-LABEL: @n8_wrong_pred3(
; CHECK-NEXT: [[R:%.*]] = icmp ne i8 [[Y:%.*]], 0
; CHECK-NEXT: ret i1 [[R]]
;
%t0 = sub i8 %x, %y
%r = icmp ne i8 %t0, %x
ret i1 %r
}
define i1 @n9_wrong_pred4(i8 %x, i8 %y) {
; CHECK-LABEL: @n9_wrong_pred4(
; CHECK-NEXT: [[T0:%.*]] = sub i8 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: [[R:%.*]] = icmp slt i8 [[T0]], [[X]]
; CHECK-NEXT: ret i1 [[R]]
;
%t0 = sub i8 %x, %y
%r = icmp slt i8 %t0, %x
ret i1 %r
}
define i1 @n10_wrong_pred5(i8 %x, i8 %y) {
; CHECK-LABEL: @n10_wrong_pred5(
; CHECK-NEXT: [[T0:%.*]] = sub i8 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: [[R:%.*]] = icmp sle i8 [[T0]], [[X]]
; CHECK-NEXT: ret i1 [[R]]
;
%t0 = sub i8 %x, %y
%r = icmp sle i8 %t0, %x
ret i1 %r
}
define i1 @n11_wrong_pred6(i8 %x, i8 %y) {
; CHECK-LABEL: @n11_wrong_pred6(
; CHECK-NEXT: [[T0:%.*]] = sub i8 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: [[R:%.*]] = icmp sgt i8 [[T0]], [[X]]
; CHECK-NEXT: ret i1 [[R]]
;
%t0 = sub i8 %x, %y
%r = icmp sgt i8 %t0, %x
ret i1 %r
}
define i1 @n12_wrong_pred7(i8 %x, i8 %y) {
; CHECK-LABEL: @n12_wrong_pred7(
; CHECK-NEXT: [[T0:%.*]] = sub i8 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: [[R:%.*]] = icmp sge i8 [[T0]], [[X]]
; CHECK-NEXT: ret i1 [[R]]
;
%t0 = sub i8 %x, %y
%r = icmp sge i8 %t0, %x
ret i1 %r
}
|