1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
| ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -instcombine -data-layout="n8:16:32" -S | FileCheck %s
; RUN: opt < %s -instcombine -data-layout="n16" -S | FileCheck %s
; PR35792 - https://bugs.llvm.org/show_bug.cgi?id=35792
define i16 @zext_add(i8 %x) {
; CHECK-LABEL: @zext_add(
; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[X:%.*]], 44
; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[TMP1]], [[X]]
; CHECK-NEXT: [[R:%.*]] = zext i8 [[TMP2]] to i16
; CHECK-NEXT: ret i16 [[R]]
;
%z = zext i8 %x to i16
%b = add i16 %z, 44
%r = and i16 %b, %z
ret i16 %r
}
define i16 @zext_sub(i8 %x) {
; CHECK-LABEL: @zext_sub(
; CHECK-NEXT: [[TMP1:%.*]] = sub i8 -5, [[X:%.*]]
; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[TMP1]], [[X]]
; CHECK-NEXT: [[R:%.*]] = zext i8 [[TMP2]] to i16
; CHECK-NEXT: ret i16 [[R]]
;
%z = zext i8 %x to i16
%b = sub i16 -5, %z
%r = and i16 %b, %z
ret i16 %r
}
define i16 @zext_mul(i8 %x) {
; CHECK-LABEL: @zext_mul(
; CHECK-NEXT: [[TMP1:%.*]] = mul i8 [[X:%.*]], 3
; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[TMP1]], [[X]]
; CHECK-NEXT: [[R:%.*]] = zext i8 [[TMP2]] to i16
; CHECK-NEXT: ret i16 [[R]]
;
%z = zext i8 %x to i16
%b = mul i16 %z, 3
%r = and i16 %b, %z
ret i16 %r
}
define i16 @zext_lshr(i8 %x) {
; CHECK-LABEL: @zext_lshr(
; CHECK-NEXT: [[TMP1:%.*]] = lshr i8 [[X:%.*]], 4
; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[TMP1]], [[X]]
; CHECK-NEXT: [[R:%.*]] = zext i8 [[TMP2]] to i16
; CHECK-NEXT: ret i16 [[R]]
;
%z = zext i8 %x to i16
%b = lshr i16 %z, 4
%r = and i16 %b, %z
ret i16 %r
}
define i16 @zext_ashr(i8 %x) {
; CHECK-LABEL: @zext_ashr(
; CHECK-NEXT: [[TMP1:%.*]] = lshr i8 [[X:%.*]], 2
; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[TMP1]], [[X]]
; CHECK-NEXT: [[R:%.*]] = zext i8 [[TMP2]] to i16
; CHECK-NEXT: ret i16 [[R]]
;
%z = zext i8 %x to i16
%b = ashr i16 %z, 2
%r = and i16 %b, %z
ret i16 %r
}
define i16 @zext_shl(i8 %x) {
; CHECK-LABEL: @zext_shl(
; CHECK-NEXT: [[TMP1:%.*]] = shl i8 [[X:%.*]], 3
; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[TMP1]], [[X]]
; CHECK-NEXT: [[R:%.*]] = zext i8 [[TMP2]] to i16
; CHECK-NEXT: ret i16 [[R]]
;
%z = zext i8 %x to i16
%b = shl i16 %z, 3
%r = and i16 %b, %z
ret i16 %r
}
define <2 x i16> @zext_add_vec(<2 x i8> %x) {
; CHECK-LABEL: @zext_add_vec(
; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i8> [[X:%.*]], <i8 44, i8 42>
; CHECK-NEXT: [[TMP2:%.*]] = and <2 x i8> [[TMP1]], [[X]]
; CHECK-NEXT: [[R:%.*]] = zext <2 x i8> [[TMP2]] to <2 x i16>
; CHECK-NEXT: ret <2 x i16> [[R]]
;
%z = zext <2 x i8> %x to <2 x i16>
%b = add <2 x i16> %z, <i16 44, i16 42>
%r = and <2 x i16> %b, %z
ret <2 x i16> %r
}
define <2 x i16> @zext_sub_vec(<2 x i8> %x) {
; CHECK-LABEL: @zext_sub_vec(
; CHECK-NEXT: [[TMP1:%.*]] = sub <2 x i8> <i8 -5, i8 -4>, [[X:%.*]]
; CHECK-NEXT: [[TMP2:%.*]] = and <2 x i8> [[TMP1]], [[X]]
; CHECK-NEXT: [[R:%.*]] = zext <2 x i8> [[TMP2]] to <2 x i16>
; CHECK-NEXT: ret <2 x i16> [[R]]
;
%z = zext <2 x i8> %x to <2 x i16>
%b = sub <2 x i16> <i16 -5, i16 -4>, %z
%r = and <2 x i16> %b, %z
ret <2 x i16> %r
}
define <2 x i16> @zext_mul_vec(<2 x i8> %x) {
; CHECK-LABEL: @zext_mul_vec(
; CHECK-NEXT: [[TMP1:%.*]] = mul <2 x i8> [[X:%.*]], <i8 3, i8 -2>
; CHECK-NEXT: [[TMP2:%.*]] = and <2 x i8> [[TMP1]], [[X]]
; CHECK-NEXT: [[R:%.*]] = zext <2 x i8> [[TMP2]] to <2 x i16>
; CHECK-NEXT: ret <2 x i16> [[R]]
;
%z = zext <2 x i8> %x to <2 x i16>
%b = mul <2 x i16> %z, <i16 3, i16 -2>
%r = and <2 x i16> %b, %z
ret <2 x i16> %r
}
define <2 x i16> @zext_lshr_vec(<2 x i8> %x) {
; CHECK-LABEL: @zext_lshr_vec(
; CHECK-NEXT: [[TMP1:%.*]] = lshr <2 x i8> [[X:%.*]], <i8 4, i8 2>
; CHECK-NEXT: [[TMP2:%.*]] = and <2 x i8> [[TMP1]], [[X]]
; CHECK-NEXT: [[R:%.*]] = zext <2 x i8> [[TMP2]] to <2 x i16>
; CHECK-NEXT: ret <2 x i16> [[R]]
;
%z = zext <2 x i8> %x to <2 x i16>
%b = lshr <2 x i16> %z, <i16 4, i16 2>
%r = and <2 x i16> %b, %z
ret <2 x i16> %r
}
define <2 x i16> @zext_ashr_vec(<2 x i8> %x) {
; CHECK-LABEL: @zext_ashr_vec(
; CHECK-NEXT: [[TMP1:%.*]] = lshr <2 x i8> [[X:%.*]], <i8 2, i8 3>
; CHECK-NEXT: [[TMP2:%.*]] = and <2 x i8> [[TMP1]], [[X]]
; CHECK-NEXT: [[R:%.*]] = zext <2 x i8> [[TMP2]] to <2 x i16>
; CHECK-NEXT: ret <2 x i16> [[R]]
;
%z = zext <2 x i8> %x to <2 x i16>
%b = ashr <2 x i16> %z, <i16 2, i16 3>
%r = and <2 x i16> %b, %z
ret <2 x i16> %r
}
define <2 x i16> @zext_shl_vec(<2 x i8> %x) {
; CHECK-LABEL: @zext_shl_vec(
; CHECK-NEXT: [[TMP1:%.*]] = shl <2 x i8> [[X:%.*]], <i8 3, i8 2>
; CHECK-NEXT: [[TMP2:%.*]] = and <2 x i8> [[TMP1]], [[X]]
; CHECK-NEXT: [[R:%.*]] = zext <2 x i8> [[TMP2]] to <2 x i16>
; CHECK-NEXT: ret <2 x i16> [[R]]
;
%z = zext <2 x i8> %x to <2 x i16>
%b = shl <2 x i16> %z, <i16 3, i16 2>
%r = and <2 x i16> %b, %z
ret <2 x i16> %r
}
; Don't create poison by narrowing a shift below the shift amount.
define <2 x i16> @zext_lshr_vec_overshift(<2 x i8> %x) {
; CHECK-LABEL: @zext_lshr_vec_overshift(
; CHECK-NEXT: [[Z:%.*]] = zext <2 x i8> [[X:%.*]] to <2 x i16>
; CHECK-NEXT: [[B:%.*]] = lshr <2 x i16> [[Z]], <i16 4, i16 8>
; CHECK-NEXT: [[R:%.*]] = and <2 x i16> [[B]], [[Z]]
; CHECK-NEXT: ret <2 x i16> [[R]]
;
%z = zext <2 x i8> %x to <2 x i16>
%b = lshr <2 x i16> %z, <i16 4, i16 8>
%r = and <2 x i16> %b, %z
ret <2 x i16> %r
}
; Don't create poison by narrowing a shift below the shift amount.
define <2 x i16> @zext_shl_vec_overshift(<2 x i8> %x) {
; CHECK-LABEL: @zext_shl_vec_overshift(
; CHECK-NEXT: [[Z:%.*]] = zext <2 x i8> [[X:%.*]] to <2 x i16>
; CHECK-NEXT: [[B:%.*]] = shl <2 x i16> [[Z]], <i16 8, i16 2>
; CHECK-NEXT: [[R:%.*]] = and <2 x i16> [[B]], [[Z]]
; CHECK-NEXT: ret <2 x i16> [[R]]
;
%z = zext <2 x i8> %x to <2 x i16>
%b = shl <2 x i16> %z, <i16 8, i16 2>
%r = and <2 x i16> %b, %z
ret <2 x i16> %r
}
|