reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

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# RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck %s -check-prefix=VI

# VI:   s_cmovk_i32 s2, 0x6 ; encoding: [0x06,0x00,0x82,0xb0]
0x06 0x00 0x82 0xb0

# VI:   s_cmpk_eq_i32 s2, 0x6 ; encoding: [0x06,0x00,0x02,0xb1]
0x06 0x00 0x02 0xb1

# VI:   s_cmpk_lg_i32 s2, 0x6 ; encoding: [0x06,0x00,0x82,0xb1]
0x06 0x00 0x82 0xb1

# VI:   s_cmpk_gt_i32 s2, 0x6 ; encoding: [0x06,0x00,0x02,0xb2]
0x06 0x00 0x02 0xb2

# VI:   s_cmpk_ge_i32 s2, 0x6 ; encoding: [0x06,0x00,0x82,0xb2]
0x06 0x00 0x82 0xb2

# VI:   s_cmpk_lt_i32 s2, 0x6 ; encoding: [0x06,0x00,0x02,0xb3]
0x06 0x00 0x02 0xb3

# VI:   s_cmpk_le_i32 s2, 0x6 ; encoding: [0x06,0x00,0x82,0xb3]
0x06 0x00 0x82 0xb3

# VI:   s_cmpk_eq_u32 s2, 0x6 ; encoding: [0x06,0x00,0x02,0xb4]
0x06 0x00 0x02 0xb4

# VI:   s_cmpk_lg_u32 s2, 0x6 ; encoding: [0x06,0x00,0x82,0xb4]
0x06 0x00 0x82 0xb4

# VI:   s_cmpk_gt_u32 s2, 0x6 ; encoding: [0x06,0x00,0x02,0xb5]
0x06 0x00 0x02 0xb5

# VI:   s_cmpk_ge_u32 s2, 0x6 ; encoding: [0x06,0x00,0x82,0xb5]
0x06 0x00 0x82 0xb5

# VI:   s_cmpk_lt_u32 s2, 0x6 ; encoding: [0x06,0x00,0x02,0xb6]
0x06 0x00 0x02 0xb6

# VI:   s_cmpk_le_u32 s2, 0x6 ; encoding: [0x06,0x00,0x82,0xb6]
0x06 0x00 0x82 0xb6

# VI:   s_addk_i32 s2, 0x6 ; encoding: [0x06,0x00,0x02,0xb7]
0x06 0x00 0x02 0xb7

# VI:   s_mulk_i32 s2, 0x6 ; encoding: [0x06,0x00,0x82,0xb7]
0x06 0x00 0x82 0xb7

# VI:   s_cbranch_i_fork s[2:3], 6 ; encoding: [0x06,0x00,0x02,0xb8]
0x06 0x00 0x02 0xb8

# VI:   s_getreg_b32 s2, hwreg(HW_REG_LDS_ALLOC) ; encoding: [0x06,0xf8,0x82,0xb8]
0x06 0xf8 0x82 0xb8

# VI:   s_getreg_b32 s2, hwreg(51) ; encoding: [0x33,0xf8,0x82,0xb8]
0x33,0xf8,0x82,0xb8

# VI:   s_getreg_b32 s2, hwreg(51, 1, 31) ; encoding: [0x73,0xf0,0x82,0xb8]
0x73,0xf0,0x82,0xb8

# VI:   s_setreg_b32 hwreg(HW_REG_LDS_ALLOC, 0, 1), s2 ; encoding: [0x06,0x00,0x02,0xb9]
0x06 0x00 0x02 0xb9

# VI:   s_setreg_imm32_b32 hwreg(HW_REG_GPR_ALLOC, 1, 31), 0xff ; encoding: [0x45,0xf0,0x00,0xba,0xff,0x00,0x00,0x00]
0x45 0xf0 0x00 0xba 0xff 0x00 0x00 0x00