1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck %s --check-prefix=CHECK --check-prefix=SKX
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s --check-prefix=CHECK --check-prefix=KNL
define <4 x float> @test_rsqrt14_ss(<4 x float> %a0) {
; CHECK-LABEL: test_rsqrt14_ss:
; CHECK: ## %bb.0:
; CHECK-NEXT: vrsqrt14ss %xmm0, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <4 x float> @llvm.x86.avx512.rsqrt14.ss(<4 x float> %a0, <4 x float> %a0, <4 x float> zeroinitializer, i8 -1) ;
ret <4 x float> %res
}
define <4 x float> @test_rsqrt14_ss_load(<4 x float> %a0, <4 x float>* %a1ptr) {
; CHECK-LABEL: test_rsqrt14_ss_load:
; CHECK: ## %bb.0:
; CHECK-NEXT: vrsqrt14ss (%rdi), %xmm0, %xmm0
; CHECK-NEXT: retq
%a1 = load <4 x float>, <4 x float>* %a1ptr
%res = call <4 x float> @llvm.x86.avx512.rsqrt14.ss(<4 x float> %a0, <4 x float> %a1, <4 x float> zeroinitializer, i8 -1) ;
ret <4 x float> %res
}
declare <4 x float> @llvm.x86.avx512.rsqrt14.ss(<4 x float>, <4 x float>, <4 x float>, i8) nounwind readnone
define <4 x float> @test_rcp14_ss(<4 x float> %a0) {
; CHECK-LABEL: test_rcp14_ss:
; CHECK: ## %bb.0:
; CHECK-NEXT: vrcp14ss %xmm0, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <4 x float> @llvm.x86.avx512.rcp14.ss(<4 x float> %a0, <4 x float> %a0, <4 x float> zeroinitializer, i8 -1) ;
ret <4 x float> %res
}
define <4 x float> @test_rcp14_ss_load(<4 x float> %a0, <4 x float>* %a1ptr) {
; CHECK-LABEL: test_rcp14_ss_load:
; CHECK: ## %bb.0:
; CHECK-NEXT: vrcp14ss (%rdi), %xmm0, %xmm0
; CHECK-NEXT: retq
%a1 = load <4 x float>, <4 x float>* %a1ptr
%res = call <4 x float> @llvm.x86.avx512.rcp14.ss(<4 x float> %a0, <4 x float> %a1, <4 x float> zeroinitializer, i8 -1) ;
ret <4 x float> %res
}
declare <4 x float> @llvm.x86.avx512.rcp14.ss(<4 x float>, <4 x float>, <4 x float>, i8) nounwind readnone
define <2 x double> @test_rsqrt14_sd(<2 x double> %a0) {
; CHECK-LABEL: test_rsqrt14_sd:
; CHECK: ## %bb.0:
; CHECK-NEXT: vrsqrt14sd %xmm0, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <2 x double> @llvm.x86.avx512.rsqrt14.sd(<2 x double> %a0, <2 x double> %a0, <2 x double> zeroinitializer, i8 -1) ;
ret <2 x double> %res
}
define <2 x double> @test_rsqrt14_sd_load(<2 x double> %a0, <2 x double>* %a1ptr) {
; CHECK-LABEL: test_rsqrt14_sd_load:
; CHECK: ## %bb.0:
; CHECK-NEXT: vrsqrt14sd (%rdi), %xmm0, %xmm0
; CHECK-NEXT: retq
%a1 = load <2 x double>, <2 x double>* %a1ptr
%res = call <2 x double> @llvm.x86.avx512.rsqrt14.sd(<2 x double> %a0, <2 x double> %a1, <2 x double> zeroinitializer, i8 -1) ;
ret <2 x double> %res
}
declare <2 x double> @llvm.x86.avx512.rsqrt14.sd(<2 x double>, <2 x double>, <2 x double>, i8) nounwind readnone
define <2 x double> @test_rcp14_sd(<2 x double> %a0) {
; CHECK-LABEL: test_rcp14_sd:
; CHECK: ## %bb.0:
; CHECK-NEXT: vrcp14sd %xmm0, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <2 x double> @llvm.x86.avx512.rcp14.sd(<2 x double> %a0, <2 x double> %a0, <2 x double> zeroinitializer, i8 -1) ;
ret <2 x double> %res
}
define <2 x double> @test_rcp14_sd_load(<2 x double> %a0, <2 x double>* %a1ptr) {
; CHECK-LABEL: test_rcp14_sd_load:
; CHECK: ## %bb.0:
; CHECK-NEXT: vrcp14sd (%rdi), %xmm0, %xmm0
; CHECK-NEXT: retq
%a1 = load <2 x double>, <2 x double>* %a1ptr
%res = call <2 x double> @llvm.x86.avx512.rcp14.sd(<2 x double> %a0, <2 x double> %a1, <2 x double> zeroinitializer, i8 -1) ;
ret <2 x double> %res
}
declare <2 x double> @llvm.x86.avx512.rcp14.sd(<2 x double>, <2 x double>, <2 x double>, i8) nounwind readnone
declare <4 x float> @llvm.x86.avx512.mask.scalef.ss(<4 x float>, <4 x float>,<4 x float>, i8, i32)
define <4 x float>@test_int_x86_avx512_mask_scalef_ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x3, i8 %x4) {
; SKX-LABEL: test_int_x86_avx512_mask_scalef_ss:
; SKX: ## %bb.0:
; SKX-NEXT: kmovd %edi, %k1
; SKX-NEXT: vscalefss %xmm1, %xmm0, %xmm2 {%k1}
; SKX-NEXT: vscalefss {rn-sae}, %xmm1, %xmm0, %xmm0
; SKX-NEXT: vaddps %xmm0, %xmm2, %xmm0
; SKX-NEXT: retq
;
; KNL-LABEL: test_int_x86_avx512_mask_scalef_ss:
; KNL: ## %bb.0:
; KNL-NEXT: kmovw %edi, %k1
; KNL-NEXT: vscalefss %xmm1, %xmm0, %xmm2 {%k1}
; KNL-NEXT: vscalefss {rn-sae}, %xmm1, %xmm0, %xmm0
; KNL-NEXT: vaddps %xmm0, %xmm2, %xmm0
; KNL-NEXT: retq
%res = call <4 x float> @llvm.x86.avx512.mask.scalef.ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x3, i8 %x4, i32 4)
%res1 = call <4 x float> @llvm.x86.avx512.mask.scalef.ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x3, i8 -1, i32 8)
%res2 = fadd <4 x float> %res, %res1
ret <4 x float> %res2
}
define <4 x float>@test_int_x86_avx512_mask_scalef_ss_load(<4 x float> %x0, <4 x float>* %x1ptr) {
; CHECK-LABEL: test_int_x86_avx512_mask_scalef_ss_load:
; CHECK: ## %bb.0:
; CHECK-NEXT: vscalefss (%rdi), %xmm0, %xmm0
; CHECK-NEXT: retq
%x1 = load <4 x float>, <4 x float>* %x1ptr
%res = call <4 x float> @llvm.x86.avx512.mask.scalef.ss(<4 x float> %x0, <4 x float> %x1, <4 x float> undef, i8 -1, i32 4)
ret <4 x float> %res
}
declare <2 x double> @llvm.x86.avx512.mask.scalef.sd(<2 x double>, <2 x double>,<2 x double>, i8, i32)
define <2 x double>@test_int_x86_avx512_mask_scalef_sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x3, i8 %x4) {
; SKX-LABEL: test_int_x86_avx512_mask_scalef_sd:
; SKX: ## %bb.0:
; SKX-NEXT: kmovd %edi, %k1
; SKX-NEXT: vscalefsd %xmm1, %xmm0, %xmm2 {%k1}
; SKX-NEXT: vscalefsd {rn-sae}, %xmm1, %xmm0, %xmm0
; SKX-NEXT: vaddpd %xmm0, %xmm2, %xmm0
; SKX-NEXT: retq
;
; KNL-LABEL: test_int_x86_avx512_mask_scalef_sd:
; KNL: ## %bb.0:
; KNL-NEXT: kmovw %edi, %k1
; KNL-NEXT: vscalefsd %xmm1, %xmm0, %xmm2 {%k1}
; KNL-NEXT: vscalefsd {rn-sae}, %xmm1, %xmm0, %xmm0
; KNL-NEXT: vaddpd %xmm0, %xmm2, %xmm0
; KNL-NEXT: retq
%res = call <2 x double> @llvm.x86.avx512.mask.scalef.sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x3, i8 %x4, i32 4)
%res1 = call <2 x double> @llvm.x86.avx512.mask.scalef.sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x3, i8 -1, i32 8)
%res2 = fadd <2 x double> %res, %res1
ret <2 x double> %res2
}
define <2 x double>@test_int_x86_avx512_mask_scalef_sd_load(<2 x double> %x0, <2 x double>* %x1ptr) {
; CHECK-LABEL: test_int_x86_avx512_mask_scalef_sd_load:
; CHECK: ## %bb.0:
; CHECK-NEXT: vscalefsd (%rdi), %xmm0, %xmm0
; CHECK-NEXT: retq
%x1 = load <2 x double>, <2 x double>* %x1ptr
%res = call <2 x double> @llvm.x86.avx512.mask.scalef.sd(<2 x double> %x0, <2 x double> %x1, <2 x double> undef, i8 -1, i32 4)
ret <2 x double> %res
}
|