reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
    1
    2
    3
    4
    5
    6
    7
    8
    9
   10
   11
   12
   13
   14
   15
   16
   17
   18
   19
   20
   21
   22
   23
   24
   25
   26
   27
   28
   29
   30
   31
   32
   33
   34
   35
   36
   37
   38
   39
   40
   41
   42
   43
   44
   45
   46
   47
   48
   49
   50
   51
   52
   53
   54
   55
   56
   57
   58
   59
   60
   61
   62
   63
   64
   65
   66
   67
   68
   69
   70
   71
   72
   73
   74
   75
   76
   77
   78
   79
   80
   81
   82
   83
   84
   85
   86
   87
   88
   89
   90
   91
   92
   93
   94
   95
   96
   97
   98
   99
  100
  101
  102
  103
  104
  105
  106
  107
  108
  109
  110
  111
  112
  113
  114
  115
  116
  117
  118
  119
  120
  121
  122
  123
  124
  125
  126
  127
  128
  129
  130
  131
  132
  133
  134
  135
  136
  137
  138
  139
  140
  141
  142
  143
  144
  145
  146
  147
  148
  149
  150
  151
  152
  153
  154
  155
  156
  157
  158
  159
  160
  161
  162
  163
  164
  165
  166
  167
  168
  169
  170
  171
  172
  173
  174
  175
  176
  177
  178
  179
  180
  181
  182
  183
  184
  185
  186
  187
  188
  189
  190
  191
  192
  193
  194
  195
  196
  197
  198
  199
  200
  201
  202
  203
  204
  205
  206
  207
  208
  209
  210
  211
  212
  213
  214
  215
  216
  217
  218
  219
  220
  221
  222
  223
  224
  225
  226
  227
  228
  229
  230
  231
  232
  233
  234
  235
  236
  237
  238
  239
  240
  241
  242
  243
  244
  245
  246
  247
  248
  249
  250
  251
  252
  253
  254
  255
  256
  257
  258
  259
  260
  261
  262
  263
  264
  265
  266
  267
  268
  269
  270
  271
  272
  273
  274
  275
  276
  277
  278
  279
  280
  281
  282
  283
  284
  285
  286
  287
  288
  289
  290
  291
  292
  293
  294
  295
  296
  297
  298
  299
  300
  301
  302
  303
  304
  305
  306
  307
  308
  309
  310
  311
  312
  313
  314
; Test 32-bit addition in which the second operand is variable.
;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s

declare i32 @foo()

; Check ALR.
define zeroext i1 @f1(i32 %dummy, i32 %a, i32 %b, i32 *%res) {
; CHECK-LABEL: f1:
; CHECK: alr %r3, %r4
; CHECK-DAG: st %r3, 0(%r5)
; CHECK-DAG: ipm [[REG:%r[0-5]]]
; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 35
; CHECK: br %r14
  %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %a, i32 %b)
  %val = extractvalue {i32, i1} %t, 0
  %obit = extractvalue {i32, i1} %t, 1
  store i32 %val, i32 *%res
  ret i1 %obit
}

; Check using the overflow result for a branch.
define void @f2(i32 %dummy, i32 %a, i32 %b, i32 *%res) {
; CHECK-LABEL: f2:
; CHECK: alr %r3, %r4
; CHECK: st %r3, 0(%r5)
; CHECK: jgnle foo@PLT
; CHECK: br %r14
  %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %a, i32 %b)
  %val = extractvalue {i32, i1} %t, 0
  %obit = extractvalue {i32, i1} %t, 1
  store i32 %val, i32 *%res
  br i1 %obit, label %call, label %exit

call:
  tail call i32 @foo()
  br label %exit

exit:
  ret void
}

; ... and the same with the inverted direction.
define void @f3(i32 %dummy, i32 %a, i32 %b, i32 *%res) {
; CHECK-LABEL: f3:
; CHECK: alr %r3, %r4
; CHECK: st %r3, 0(%r5)
; CHECK: jgle foo@PLT
; CHECK: br %r14
  %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %a, i32 %b)
  %val = extractvalue {i32, i1} %t, 0
  %obit = extractvalue {i32, i1} %t, 1
  store i32 %val, i32 *%res
  br i1 %obit, label %exit, label %call

call:
  tail call i32 @foo()
  br label %exit

exit:
  ret void
}

; Check the low end of the AL range.
define zeroext i1 @f4(i32 %dummy, i32 %a, i32 *%src, i32 *%res) {
; CHECK-LABEL: f4:
; CHECK: al %r3, 0(%r4)
; CHECK-DAG: st %r3, 0(%r5)
; CHECK-DAG: ipm [[REG:%r[0-5]]]
; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 35
; CHECK: br %r14
  %b = load i32, i32 *%src
  %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %a, i32 %b)
  %val = extractvalue {i32, i1} %t, 0
  %obit = extractvalue {i32, i1} %t, 1
  store i32 %val, i32 *%res
  ret i1 %obit
}

; Check the high end of the aligned AL range.
define zeroext i1 @f5(i32 %dummy, i32 %a, i32 *%src, i32 *%res) {
; CHECK-LABEL: f5:
; CHECK: al %r3, 4092(%r4)
; CHECK-DAG: st %r3, 0(%r5)
; CHECK-DAG: ipm [[REG:%r[0-5]]]
; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 35
; CHECK: br %r14
  %ptr = getelementptr i32, i32 *%src, i64 1023
  %b = load i32, i32 *%ptr
  %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %a, i32 %b)
  %val = extractvalue {i32, i1} %t, 0
  %obit = extractvalue {i32, i1} %t, 1
  store i32 %val, i32 *%res
  ret i1 %obit
}

; Check the next word up, which should use ALY instead of AL.
define zeroext i1 @f6(i32 %dummy, i32 %a, i32 *%src, i32 *%res) {
; CHECK-LABEL: f6:
; CHECK: aly %r3, 4096(%r4)
; CHECK-DAG: st %r3, 0(%r5)
; CHECK-DAG: ipm [[REG:%r[0-5]]]
; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 35
; CHECK: br %r14
  %ptr = getelementptr i32, i32 *%src, i64 1024
  %b = load i32, i32 *%ptr
  %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %a, i32 %b)
  %val = extractvalue {i32, i1} %t, 0
  %obit = extractvalue {i32, i1} %t, 1
  store i32 %val, i32 *%res
  ret i1 %obit
}

; Check the high end of the aligned ALY range.
define zeroext i1 @f7(i32 %dummy, i32 %a, i32 *%src, i32 *%res) {
; CHECK-LABEL: f7:
; CHECK: aly %r3, 524284(%r4)
; CHECK-DAG: st %r3, 0(%r5)
; CHECK-DAG: ipm [[REG:%r[0-5]]]
; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 35
; CHECK: br %r14
  %ptr = getelementptr i32, i32 *%src, i64 131071
  %b = load i32, i32 *%ptr
  %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %a, i32 %b)
  %val = extractvalue {i32, i1} %t, 0
  %obit = extractvalue {i32, i1} %t, 1
  store i32 %val, i32 *%res
  ret i1 %obit
}

; Check the next word up, which needs separate address logic.
; Other sequences besides this one would be OK.
define zeroext i1 @f8(i32 %dummy, i32 %a, i32 *%src, i32 *%res) {
; CHECK-LABEL: f8:
; CHECK: agfi %r4, 524288
; CHECK: al %r3, 0(%r4)
; CHECK-DAG: st %r3, 0(%r5)
; CHECK-DAG: ipm [[REG:%r[0-5]]]
; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 35
; CHECK: br %r14
  %ptr = getelementptr i32, i32 *%src, i64 131072
  %b = load i32, i32 *%ptr
  %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %a, i32 %b)
  %val = extractvalue {i32, i1} %t, 0
  %obit = extractvalue {i32, i1} %t, 1
  store i32 %val, i32 *%res
  ret i1 %obit
}

; Check the high end of the negative aligned ALY range.
define zeroext i1 @f9(i32 %dummy, i32 %a, i32 *%src, i32 *%res) {
; CHECK-LABEL: f9:
; CHECK: aly %r3, -4(%r4)
; CHECK-DAG: st %r3, 0(%r5)
; CHECK-DAG: ipm [[REG:%r[0-5]]]
; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 35
; CHECK: br %r14
  %ptr = getelementptr i32, i32 *%src, i64 -1
  %b = load i32, i32 *%ptr
  %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %a, i32 %b)
  %val = extractvalue {i32, i1} %t, 0
  %obit = extractvalue {i32, i1} %t, 1
  store i32 %val, i32 *%res
  ret i1 %obit
}

; Check the low end of the ALY range.
define zeroext i1 @f10(i32 %dummy, i32 %a, i32 *%src, i32 *%res) {
; CHECK-LABEL: f10:
; CHECK: aly %r3, -524288(%r4)
; CHECK-DAG: st %r3, 0(%r5)
; CHECK-DAG: ipm [[REG:%r[0-5]]]
; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 35
; CHECK: br %r14
  %ptr = getelementptr i32, i32 *%src, i64 -131072
  %b = load i32, i32 *%ptr
  %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %a, i32 %b)
  %val = extractvalue {i32, i1} %t, 0
  %obit = extractvalue {i32, i1} %t, 1
  store i32 %val, i32 *%res
  ret i1 %obit
}

; Check the next word down, which needs separate address logic.
; Other sequences besides this one would be OK.
define zeroext i1 @f11(i32 %dummy, i32 %a, i32 *%src, i32 *%res) {
; CHECK-LABEL: f11:
; CHECK: agfi %r4, -524292
; CHECK: al %r3, 0(%r4)
; CHECK-DAG: st %r3, 0(%r5)
; CHECK-DAG: ipm [[REG:%r[0-5]]]
; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 35
; CHECK: br %r14
  %ptr = getelementptr i32, i32 *%src, i64 -131073
  %b = load i32, i32 *%ptr
  %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %a, i32 %b)
  %val = extractvalue {i32, i1} %t, 0
  %obit = extractvalue {i32, i1} %t, 1
  store i32 %val, i32 *%res
  ret i1 %obit
}

; Check that AL allows an index.
define zeroext i1 @f12(i64 %src, i64 %index, i32 %a, i32 *%res) {
; CHECK-LABEL: f12:
; CHECK: al %r4, 4092({{%r3,%r2|%r2,%r3}})
; CHECK-DAG: st %r4, 0(%r5)
; CHECK-DAG: ipm [[REG:%r[0-5]]]
; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 35
; CHECK: br %r14
  %add1 = add i64 %src, %index
  %add2 = add i64 %add1, 4092
  %ptr = inttoptr i64 %add2 to i32 *
  %b = load i32, i32 *%ptr
  %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %a, i32 %b)
  %val = extractvalue {i32, i1} %t, 0
  %obit = extractvalue {i32, i1} %t, 1
  store i32 %val, i32 *%res
  ret i1 %obit
}

; Check that ALY allows an index.
define zeroext i1 @f13(i64 %src, i64 %index, i32 %a, i32 *%res) {
; CHECK-LABEL: f13:
; CHECK: aly %r4, 4096({{%r3,%r2|%r2,%r3}})
; CHECK-DAG: st %r4, 0(%r5)
; CHECK-DAG: ipm [[REG:%r[0-5]]]
; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 35
; CHECK: br %r14
  %add1 = add i64 %src, %index
  %add2 = add i64 %add1, 4096
  %ptr = inttoptr i64 %add2 to i32 *
  %b = load i32, i32 *%ptr
  %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %a, i32 %b)
  %val = extractvalue {i32, i1} %t, 0
  %obit = extractvalue {i32, i1} %t, 1
  store i32 %val, i32 *%res
  ret i1 %obit
}

; Check that additions of spilled values can use AL rather than ALR.
define zeroext i1 @f14(i32 *%ptr0) {
; CHECK-LABEL: f14:
; CHECK: brasl %r14, foo@PLT
; CHECK: al %r2, 16{{[04]}}(%r15)
; CHECK: br %r14
  %ptr1 = getelementptr i32, i32 *%ptr0, i64 2
  %ptr2 = getelementptr i32, i32 *%ptr0, i64 4
  %ptr3 = getelementptr i32, i32 *%ptr0, i64 6
  %ptr4 = getelementptr i32, i32 *%ptr0, i64 8
  %ptr5 = getelementptr i32, i32 *%ptr0, i64 10
  %ptr6 = getelementptr i32, i32 *%ptr0, i64 12
  %ptr7 = getelementptr i32, i32 *%ptr0, i64 14
  %ptr8 = getelementptr i32, i32 *%ptr0, i64 16
  %ptr9 = getelementptr i32, i32 *%ptr0, i64 18

  %val0 = load i32, i32 *%ptr0
  %val1 = load i32, i32 *%ptr1
  %val2 = load i32, i32 *%ptr2
  %val3 = load i32, i32 *%ptr3
  %val4 = load i32, i32 *%ptr4
  %val5 = load i32, i32 *%ptr5
  %val6 = load i32, i32 *%ptr6
  %val7 = load i32, i32 *%ptr7
  %val8 = load i32, i32 *%ptr8
  %val9 = load i32, i32 *%ptr9

  %ret = call i32 @foo()

  %t0 = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %ret, i32 %val0)
  %add0 = extractvalue {i32, i1} %t0, 0
  %obit0 = extractvalue {i32, i1} %t0, 1
  %t1 = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %add0, i32 %val1)
  %add1 = extractvalue {i32, i1} %t1, 0
  %obit1 = extractvalue {i32, i1} %t1, 1
  %res1 = or i1 %obit0, %obit1
  %t2 = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %add1, i32 %val2)
  %add2 = extractvalue {i32, i1} %t2, 0
  %obit2 = extractvalue {i32, i1} %t2, 1
  %res2 = or i1 %res1, %obit2
  %t3 = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %add2, i32 %val3)
  %add3 = extractvalue {i32, i1} %t3, 0
  %obit3 = extractvalue {i32, i1} %t3, 1
  %res3 = or i1 %res2, %obit3
  %t4 = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %add3, i32 %val4)
  %add4 = extractvalue {i32, i1} %t4, 0
  %obit4 = extractvalue {i32, i1} %t4, 1
  %res4 = or i1 %res3, %obit4
  %t5 = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %add4, i32 %val5)
  %add5 = extractvalue {i32, i1} %t5, 0
  %obit5 = extractvalue {i32, i1} %t5, 1
  %res5 = or i1 %res4, %obit5
  %t6 = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %add5, i32 %val6)
  %add6 = extractvalue {i32, i1} %t6, 0
  %obit6 = extractvalue {i32, i1} %t6, 1
  %res6 = or i1 %res5, %obit6
  %t7 = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %add6, i32 %val7)
  %add7 = extractvalue {i32, i1} %t7, 0
  %obit7 = extractvalue {i32, i1} %t7, 1
  %res7 = or i1 %res6, %obit7
  %t8 = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %add7, i32 %val8)
  %add8 = extractvalue {i32, i1} %t8, 0
  %obit8 = extractvalue {i32, i1} %t8, 1
  %res8 = or i1 %res7, %obit8
  %t9 = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %add8, i32 %val9)
  %add9 = extractvalue {i32, i1} %t9, 0
  %obit9 = extractvalue {i32, i1} %t9, 1
  %res9 = or i1 %res8, %obit9

  ret i1 %res9
}

declare {i32, i1} @llvm.uadd.with.overflow.i32(i32, i32) nounwind readnone