1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -relocation-model=pic -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
; RUN: llc -relocation-model=pic -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
@glob = local_unnamed_addr global i8 0, align 1
; Function Attrs: norecurse nounwind readnone
define signext i32 @test_igtuc(i8 zeroext %a, i8 zeroext %b) {
; CHECK-LABEL: test_igtuc:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: sub r3, r4, r3
; CHECK-NEXT: rldicl r3, r3, 1, 63
; CHECK-NEXT: blr
entry:
%cmp = icmp ugt i8 %a, %b
%conv2 = zext i1 %cmp to i32
ret i32 %conv2
}
; Function Attrs: norecurse nounwind readnone
define signext i32 @test_igtuc_sext(i8 zeroext %a, i8 zeroext %b) {
; CHECK-LABEL: test_igtuc_sext:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: sub r3, r4, r3
; CHECK-NEXT: sradi r3, r3, 63
; CHECK-NEXT: blr
entry:
%cmp = icmp ugt i8 %a, %b
%sub = sext i1 %cmp to i32
ret i32 %sub
}
; Function Attrs: norecurse nounwind readnone
define signext i32 @test_igtuc_z(i8 zeroext %a) {
; CHECK-LABEL: test_igtuc_z:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cntlzw r3, r3
; CHECK-NEXT: srwi r3, r3, 5
; CHECK-NEXT: xori r3, r3, 1
; CHECK-NEXT: blr
entry:
%cmp = icmp ne i8 %a, 0
%conv1 = zext i1 %cmp to i32
ret i32 %conv1
}
; Function Attrs: norecurse nounwind readnone
define signext i32 @test_igtuc_sext_z(i8 zeroext %a) {
; CHECK-LABEL: test_igtuc_sext_z:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cntlzw r3, r3
; CHECK-NEXT: srwi r3, r3, 5
; CHECK-NEXT: xori r3, r3, 1
; CHECK-NEXT: neg r3, r3
; CHECK-NEXT: blr
entry:
%cmp = icmp ne i8 %a, 0
%sub = sext i1 %cmp to i32
ret i32 %sub
}
; Function Attrs: norecurse nounwind
define void @test_igtuc_store(i8 zeroext %a, i8 zeroext %b) {
; CHECK-LABEL: test_igtuc_store:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis r5, r2, .LC0@toc@ha
; CHECK-NEXT: sub r3, r4, r3
; CHECK-NEXT: ld r5, .LC0@toc@l(r5)
; CHECK-NEXT: rldicl r3, r3, 1, 63
; CHECK-NEXT: stb r3, 0(r5)
; CHECK-NEXT: blr
entry:
%cmp = icmp ugt i8 %a, %b
%conv3 = zext i1 %cmp to i8
store i8 %conv3, i8* @glob, align 1
ret void
}
; Function Attrs: norecurse nounwind
define void @test_igtuc_sext_store(i8 zeroext %a, i8 zeroext %b) {
; CHECK-LABEL: test_igtuc_sext_store:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis r5, r2, .LC0@toc@ha
; CHECK-NEXT: sub r3, r4, r3
; CHECK-NEXT: ld r5, .LC0@toc@l(r5)
; CHECK-NEXT: sradi r3, r3, 63
; CHECK-NEXT: stb r3, 0(r5)
; CHECK-NEXT: blr
entry:
%cmp = icmp ugt i8 %a, %b
%conv3 = sext i1 %cmp to i8
store i8 %conv3, i8* @glob, align 1
ret void
}
; Function Attrs: norecurse nounwind
define void @test_igtuc_z_store(i8 zeroext %a) {
; CHECK-LABEL: test_igtuc_z_store:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis r4, r2, .LC0@toc@ha
; CHECK-NEXT: cntlzw r3, r3
; CHECK-NEXT: ld r4, .LC0@toc@l(r4)
; CHECK-NEXT: srwi r3, r3, 5
; CHECK-NEXT: xori r3, r3, 1
; CHECK-NEXT: stb r3, 0(r4)
; CHECK-NEXT: blr
entry:
%cmp = icmp ne i8 %a, 0
%conv2 = zext i1 %cmp to i8
store i8 %conv2, i8* @glob, align 1
ret void
}
; Function Attrs: norecurse nounwind
define void @test_igtuc_sext_z_store(i8 zeroext %a) {
; CHECK-LABEL: test_igtuc_sext_z_store:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis r4, r2, .LC0@toc@ha
; CHECK-NEXT: cntlzw r3, r3
; CHECK-NEXT: srwi r3, r3, 5
; CHECK-NEXT: ld r4, .LC0@toc@l(r4)
; CHECK-NEXT: xori r3, r3, 1
; CHECK-NEXT: neg r3, r3
; CHECK-NEXT: stb r3, 0(r4)
; CHECK-NEXT: blr
entry:
%cmp = icmp ne i8 %a, 0
%conv2 = sext i1 %cmp to i8
store i8 %conv2, i8* @glob, align 1
ret void
}
|