reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
    1
    2
    3
    4
    5
    6
    7
    8
    9
   10
   11
   12
   13
   14
   15
   16
   17
   18
   19
   20
   21
   22
   23
   24
   25
   26
   27
   28
   29
   30
   31
   32
   33
   34
   35
   36
   37
   38
   39
   40
   41
   42
   43
   44
   45
   46
   47
   48
   49
   50
   51
   52
   53
   54
   55
   56
   57
   58
   59
   60
   61
   62
   63
   64
   65
   66
   67
   68
   69
   70
   71
   72
   73
   74
   75
   76
   77
   78
   79
   80
   81
   82
   83
   84
   85
   86
   87
   88
   89
   90
   91
   92
   93
   94
   95
   96
   97
   98
   99
  100
  101
  102
  103
  104
  105
  106
  107
  108
  109
  110
  111
  112
  113
  114
  115
  116
  117
  118
  119
  120
  121
  122
  123
  124
  125
  126
  127
  128
  129
  130
  131
  132
  133
  134
  135
  136
  137
  138
  139
  140
  141
  142
  143
  144
  145
  146
  147
  148
  149
  150
  151
  152
  153
  154
  155
  156
  157
  158
  159
  160
  161
  162
  163
  164
  165
  166
  167
  168
  169
  170
  171
  172
  173
  174
  175
  176
  177
  178
  179
  180
  181
  182
  183
  184
  185
  186
  187
  188
  189
  190
  191
  192
; RUN: llc -o - -mtriple=powerpc64le-unknown-gnu-linux -stop-after codegenprepare %s | FileCheck %s
; RUN: llc -o - -mtriple=powerpc64-unknown-gnu-linux -stop-after codegenprepare %s | FileCheck %s --check-prefix=CHECK-BE

define signext i32 @test1(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2)  {
entry:
  ; CHECK-LABEL: @test1(
  ; CHECK: [[LOAD1:%[0-9]+]] = load i64, i64*
  ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i64, i64*
  ; CHECK-NEXT: [[BSWAP1:%[0-9]+]] = call i64 @llvm.bswap.i64(i64 [[LOAD1]])
  ; CHECK-NEXT: [[BSWAP2:%[0-9]+]] = call i64 @llvm.bswap.i64(i64 [[LOAD2]])
  ; CHECK-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[BSWAP1]], [[BSWAP2]]
  ; CHECK-NEXT:  br i1 [[ICMP]], label %loadbb1, label %res_block

  ; CHECK-LABEL: res_block:{{.*}}
  ; CHECK: [[ICMP2:%[0-9]+]] = icmp ult i64
  ; CHECK-NEXT: [[SELECT:%[0-9]+]] = select i1 [[ICMP2]], i32 -1, i32 1
  ; CHECK-NEXT: br label %endblock

  ; CHECK-LABEL: loadbb1:{{.*}}
  ; CHECK: [[BCC1:%[0-9]+]] = bitcast i32* {{.*}} to i8*
  ; CHECK-NEXT: [[BCC2:%[0-9]+]] = bitcast i32* {{.*}} to i8*
  ; CHECK-NEXT: [[GEP1:%[0-9]+]] = getelementptr i8, i8* [[BCC2]], i8 8
  ; CHECK-NEXT: [[BCL1:%[0-9]+]] = bitcast i8* [[GEP1]] to i64*
  ; CHECK-NEXT: [[GEP2:%[0-9]+]] = getelementptr i8, i8* [[BCC1]], i8 8
  ; CHECK-NEXT: [[BCL2:%[0-9]+]] = bitcast i8* [[GEP2]] to i64*
  ; CHECK-NEXT: [[LOAD1:%[0-9]+]] = load i64, i64* [[BCL1]]
  ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i64, i64* [[BCL2]]
  ; CHECK-NEXT: [[BSWAP1:%[0-9]+]] = call i64 @llvm.bswap.i64(i64 [[LOAD1]])
  ; CHECK-NEXT: [[BSWAP2:%[0-9]+]] = call i64 @llvm.bswap.i64(i64 [[LOAD2]])
  ; CHECK-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[BSWAP1]], [[BSWAP2]]
  ; CHECK-NEXT:  br i1 [[ICMP]], label %endblock, label %res_block

  ; CHECK-BE-LABEL: @test1(
  ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i64, i64*
  ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i64, i64*
  ; CHECK-BE-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[LOAD1]], [[LOAD2]]
  ; CHECK-BE-NEXT:  br i1 [[ICMP]], label %loadbb1, label %res_block

  ; CHECK-BE-LABEL: res_block:{{.*}}
  ; CHECK-BE: [[ICMP2:%[0-9]+]] = icmp ult i64
  ; CHECK-BE-NEXT: [[SELECT:%[0-9]+]] = select i1 [[ICMP2]], i32 -1, i32 1
  ; CHECK-BE-NEXT: br label %endblock

  ; CHECK-BE-LABEL: loadbb1:{{.*}}
  ; CHECK-BE: [[BCC1:%[0-9]+]] = bitcast i32* {{.*}} to i8*
  ; CHECK-BE-NEXT: [[BCC2:%[0-9]+]] = bitcast i32* {{.*}} to i8*
  ; CHECK-BE-NEXT: [[GEP1:%[0-9]+]] = getelementptr i8, i8* [[BCC2]], i8 8
  ; CHECK-BE-NEXT: [[BCL1:%[0-9]+]] = bitcast i8* [[GEP1]] to i64*
  ; CHECK-BE-NEXT: [[GEP2:%[0-9]+]] = getelementptr i8, i8* [[BCC1]], i8 8
  ; CHECK-BE-NEXT: [[BCL2:%[0-9]+]] = bitcast i8* [[GEP2]] to i64*
  ; CHECK-BE-NEXT: [[LOAD1:%[0-9]+]] = load i64, i64* [[BCL1]]
  ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i64, i64* [[BCL2]]
  ; CHECK-BE-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[LOAD1]], [[LOAD2]]
  ; CHECK-BE-NEXT:  br i1 [[ICMP]], label %endblock, label %res_block

  %0 = bitcast i32* %buffer1 to i8*
  %1 = bitcast i32* %buffer2 to i8*
  %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 16)
  ret i32 %call
}

declare signext i32 @memcmp(i8* nocapture, i8* nocapture, i64) local_unnamed_addr #1

define signext i32 @test2(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2)  {
  ; CHECK-LABEL: @test2(
  ; CHECK: [[LOAD1:%[0-9]+]] = load i32, i32*
  ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i32, i32*
  ; CHECK-NEXT: [[BSWAP1:%[0-9]+]] = call i32 @llvm.bswap.i32(i32 [[LOAD1]])
  ; CHECK-NEXT: [[BSWAP2:%[0-9]+]] = call i32 @llvm.bswap.i32(i32 [[LOAD2]])
  ; CHECK-NEXT: [[CMP1:%[0-9]+]] = icmp ugt i32 [[BSWAP1]], [[BSWAP2]]
  ; CHECK-NEXT: [[CMP2:%[0-9]+]] = icmp ult i32 [[BSWAP1]], [[BSWAP2]]
  ; CHECK-NEXT: [[Z1:%[0-9]+]] = zext i1 [[CMP1]] to i32
  ; CHECK-NEXT: [[Z2:%[0-9]+]] = zext i1 [[CMP2]] to i32
  ; CHECK-NEXT: [[SUB:%[0-9]+]] = sub i32 [[Z1]], [[Z2]]
  ; CHECK-NEXT: ret i32 [[SUB]]

  ; CHECK-BE-LABEL: @test2(
  ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i32, i32*
  ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i32, i32*
  ; CHECK-BE-NEXT: [[CMP1:%[0-9]+]] = icmp ugt i32 [[LOAD1]], [[LOAD2]]
  ; CHECK-BE-NEXT: [[CMP2:%[0-9]+]] = icmp ult i32 [[LOAD1]], [[LOAD2]]
  ; CHECK-BE-NEXT: [[Z1:%[0-9]+]] = zext i1 [[CMP1]] to i32
  ; CHECK-BE-NEXT: [[Z2:%[0-9]+]] = zext i1 [[CMP2]] to i32
  ; CHECK-BE-NEXT: [[SUB:%[0-9]+]] = sub i32 [[Z1]], [[Z2]]
  ; CHECK-BE-NEXT: ret i32 [[SUB]]

entry:
  %0 = bitcast i32* %buffer1 to i8*
  %1 = bitcast i32* %buffer2 to i8*
  %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 4)
  ret i32 %call
}

define signext i32 @test3(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2)  {
  ; CHECK: [[LOAD1:%[0-9]+]] = load i64, i64*
  ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i64, i64*
  ; CHECK-NEXT: [[BSWAP1:%[0-9]+]] = call i64 @llvm.bswap.i64(i64 [[LOAD1]])
  ; CHECK-NEXT: [[BSWAP2:%[0-9]+]] = call i64 @llvm.bswap.i64(i64 [[LOAD2]])
  ; CHECK-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[BSWAP1]], [[BSWAP2]]
  ; CHECK-NEXT:  br i1 [[ICMP]], label %loadbb1, label %res_block

  ; CHECK-LABEL: res_block:{{.*}}
  ; CHECK: [[ICMP2:%[0-9]+]] = icmp ult i64
  ; CHECK-NEXT: [[SELECT:%[0-9]+]] = select i1 [[ICMP2]], i32 -1, i32 1
  ; CHECK-NEXT: br label %endblock

  ; CHECK-LABEL: loadbb1:{{.*}}
  ; CHECK: [[LOAD1:%[0-9]+]] = load i32, i32*
  ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i32, i32*
  ; CHECK-NEXT: [[BSWAP1:%[0-9]+]] = call i32 @llvm.bswap.i32(i32 [[LOAD1]])
  ; CHECK-NEXT: [[BSWAP2:%[0-9]+]] = call i32 @llvm.bswap.i32(i32 [[LOAD2]])
  ; CHECK-NEXT: [[ZEXT1:%[0-9]+]] = zext i32 [[BSWAP1]] to i64
  ; CHECK-NEXT: [[ZEXT2:%[0-9]+]] = zext i32 [[BSWAP2]] to i64
  ; CHECK-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[ZEXT1]], [[ZEXT2]]
  ; CHECK-NEXT:  br i1 [[ICMP]], label %loadbb2, label %res_block

  ; CHECK-LABEL: loadbb2:{{.*}}
  ; CHECK: [[LOAD1:%[0-9]+]] = load i16, i16*
  ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i16, i16*
  ; CHECK-NEXT: [[BSWAP1:%[0-9]+]] = call i16 @llvm.bswap.i16(i16 [[LOAD1]])
  ; CHECK-NEXT: [[BSWAP2:%[0-9]+]] = call i16 @llvm.bswap.i16(i16 [[LOAD2]])
  ; CHECK-NEXT: [[ZEXT1:%[0-9]+]] = zext i16 [[BSWAP1]] to i64
  ; CHECK-NEXT: [[ZEXT2:%[0-9]+]] = zext i16 [[BSWAP2]] to i64
  ; CHECK-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[ZEXT1]], [[ZEXT2]]
  ; CHECK-NEXT:  br i1 [[ICMP]], label %loadbb3, label %res_block

  ; CHECK-LABEL: loadbb3:{{.*}}
  ; CHECK: [[LOAD1:%[0-9]+]] = load i8, i8*
  ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i8, i8*
  ; CHECK-NEXT: [[ZEXT1:%[0-9]+]] = zext i8 [[LOAD1]] to i32
  ; CHECK-NEXT: [[ZEXT2:%[0-9]+]] = zext i8 [[LOAD2]] to i32
  ; CHECK-NEXT: [[SUB:%[0-9]+]] = sub i32 [[ZEXT1]], [[ZEXT2]]
  ; CHECK-NEXT:  br label %endblock

  ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i64, i64*
  ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i64, i64*
  ; CHECK-BE-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[LOAD1]], [[LOAD2]]
  ; CHECK-BE-NEXT:  br i1 [[ICMP]], label %loadbb1, label %res_block

  ; CHECK-BE-LABEL: res_block:{{.*}}
  ; CHECK-BE: [[ICMP2:%[0-9]+]] = icmp ult i64
  ; CHECK-BE-NEXT: [[SELECT:%[0-9]+]] = select i1 [[ICMP2]], i32 -1, i32 1
  ; CHECK-BE-NEXT: br label %endblock

  ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i32, i32*
  ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i32, i32*
  ; CHECK-BE-NEXT: [[ZEXT1:%[0-9]+]] = zext i32 [[LOAD1]] to i64
  ; CHECK-BE-NEXT: [[ZEXT2:%[0-9]+]] = zext i32 [[LOAD2]] to i64
  ; CHECK-BE-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[ZEXT1]], [[ZEXT2]]
  ; CHECK-BE-NEXT:  br i1 [[ICMP]], label %loadbb2, label %res_block

  ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i16, i16*
  ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i16, i16*
  ; CHECK-BE-NEXT: [[ZEXT1:%[0-9]+]] = zext i16 [[LOAD1]] to i64
  ; CHECK-BE-NEXT: [[ZEXT2:%[0-9]+]] = zext i16 [[LOAD2]] to i64
  ; CHECK-BE-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[ZEXT1]], [[ZEXT2]]
  ; CHECK-BE-NEXT:  br i1 [[ICMP]], label %loadbb3, label %res_block

  ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i8, i8*
  ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i8, i8*
  ; CHECK-BE-NEXT: [[ZEXT1:%[0-9]+]] = zext i8 [[LOAD1]] to i32
  ; CHECK-BE-NEXT: [[ZEXT2:%[0-9]+]] = zext i8 [[LOAD2]] to i32
  ; CHECK-BE-NEXT: [[SUB:%[0-9]+]] = sub i32 [[ZEXT1]], [[ZEXT2]]
  ; CHECK-BE-NEXT:  br label %endblock

entry:
  %0 = bitcast i32* %buffer1 to i8*
  %1 = bitcast i32* %buffer2 to i8*
  %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 15)
  ret i32 %call
}
  ; CHECK: call = tail call signext i32 @memcmp
  ; CHECK-BE: call = tail call signext i32 @memcmp
define signext i32 @test4(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2)  {

entry:
  %0 = bitcast i32* %buffer1 to i8*
  %1 = bitcast i32* %buffer2 to i8*
  %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 65)
  ret i32 %call
}

define signext i32 @test5(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2, i32 signext %SIZE)  {
  ; CHECK: call = tail call signext i32 @memcmp
  ; CHECK-BE: call = tail call signext i32 @memcmp
entry:
  %0 = bitcast i32* %buffer1 to i8*
  %1 = bitcast i32* %buffer2 to i8*
  %conv = sext i32 %SIZE to i64
  %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 %conv)
  ret i32 %call
}