1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=powerpc64-- -mattr=altivec -verify-machineinstrs < %s | FileCheck %s
; This would assert because the widened vector op is
; legal/custom, but the scalar op is expanded.
define i32 @PR42010(<2 x float> %x) {
; CHECK-LABEL: PR42010:
; CHECK: # %bb.0:
; CHECK-NEXT: addi 3, 1, -32
; CHECK-NEXT: vrfiz 2, 2
; CHECK-NEXT: stvx 2, 0, 3
; CHECK-NEXT: lfs 0, -28(1)
; CHECK-NEXT: fctiwz 0, 0
; CHECK-NEXT: stfd 0, -8(1)
; CHECK-NEXT: lwz 3, -4(1)
; CHECK-NEXT: blr
%t0 = call <2 x float> @llvm.trunc.v2f32(<2 x float> %x)
%t1 = extractelement <2 x float> %t0, i32 1
%t2 = fptosi float %t1 to i32
ret i32 %t2
}
declare <2 x float> @llvm.trunc.v2f32(<2 x float>)
|