reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

    1
    2
    3
    4
    5
    6
    7
    8
    9
   10
   11
   12
   13
   14
   15
   16
   17
   18
   19
   20
   21
   22
   23
   24
   25
   26
   27
   28
   29
   30
   31
   32
   33
   34
   35
   36
   37
   38
   39
   40
   41
   42
   43
   44
   45
   46
   47
   48
   49
   50
   51
   52
   53
   54
   55
   56
   57
   58
   59
   60
   61
   62
   63
   64
   65
   66
   67
   68
   69
   70
   71
   72
   73
   74
   75
   76
   77
   78
   79
   80
   81
   82
   83
   84
   85
   86
   87
   88
   89
   90
   91
   92
   93
   94
   95
   96
   97
   98
   99
  100
  101
  102
  103
  104
  105
  106
  107
  108
  109
  110
  111

; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s

target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"


define void @one(i64 %a, i64 %b, i64* %p1, i64* %p2) {
; CHECK: cvt.s64.s8
; CHECK: cvt.s64.s8
entry:
  %sext = shl i64 %a, 56
  %conv1 = ashr exact i64 %sext, 56
  %sext1 = shl i64 %b, 56
  %conv4 = ashr exact i64 %sext1, 56
  %shr = ashr i64 %a, 16
  %shr9 = ashr i64 %b, 16
  %add = add nsw i64 %conv4, %conv1
  store i64 %add, i64* %p1, align 8
  %add17 = add nsw i64 %shr9, %shr
  store i64 %add17, i64* %p2, align 8
  ret void
}


define void @two(i64 %a, i64 %b, i64* %p1, i64* %p2) {
entry:
; CHECK: cvt.s64.s32
; CHECK: cvt.s64.s32
  %sext = shl i64 %a, 32
  %conv1 = ashr exact i64 %sext, 32
  %sext1 = shl i64 %b, 32
  %conv4 = ashr exact i64 %sext1, 32
  %shr = ashr i64 %a, 16
  %shr9 = ashr i64 %b, 16
  %add = add nsw i64 %conv4, %conv1
  store i64 %add, i64* %p1, align 8
  %add17 = add nsw i64 %shr9, %shr
  store i64 %add17, i64* %p2, align 8
  ret void
}


define void @three(i64 %a, i64 %b, i64* %p1, i64* %p2) {
entry:
; CHECK: cvt.s64.s16
; CHECK: cvt.s64.s16
  %sext = shl i64 %a, 48
  %conv1 = ashr exact i64 %sext, 48
  %sext1 = shl i64 %b, 48
  %conv4 = ashr exact i64 %sext1, 48
  %shr = ashr i64 %a, 16
  %shr9 = ashr i64 %b, 16
  %add = add nsw i64 %conv4, %conv1
  store i64 %add, i64* %p1, align 8
  %add17 = add nsw i64 %shr9, %shr
  store i64 %add17, i64* %p2, align 8
  ret void
}


define void @four(i32 %a, i32 %b, i32* %p1, i32* %p2) {
entry:
; CHECK: cvt.s32.s8
; CHECK: cvt.s32.s8
  %sext = shl i32 %a, 24
  %conv1 = ashr exact i32 %sext, 24
  %sext1 = shl i32 %b, 24
  %conv4 = ashr exact i32 %sext1, 24
  %shr = ashr i32 %a, 16
  %shr9 = ashr i32 %b, 16
  %add = add nsw i32 %conv4, %conv1
  store i32 %add, i32* %p1, align 4
  %add17 = add nsw i32 %shr9, %shr
  store i32 %add17, i32* %p2, align 4
  ret void
}


define void @five(i32 %a, i32 %b, i32* %p1, i32* %p2) {
entry:
; CHECK: cvt.s32.s16
; CHECK: cvt.s32.s16
  %sext = shl i32 %a, 16
  %conv1 = ashr exact i32 %sext, 16
  %sext1 = shl i32 %b, 16
  %conv4 = ashr exact i32 %sext1, 16
  %shr = ashr i32 %a, 16
  %shr9 = ashr i32 %b, 16
  %add = add nsw i32 %conv4, %conv1
  store i32 %add, i32* %p1, align 4
  %add17 = add nsw i32 %shr9, %shr
  store i32 %add17, i32* %p2, align 4
  ret void
}


define void @six(i16 %a, i16 %b, i16* %p1, i16* %p2) {
entry:
; CHECK: cvt.s16.s8
; CHECK: cvt.s16.s8
  %sext = shl i16 %a, 8
  %conv1 = ashr exact i16 %sext, 8
  %sext1 = shl i16 %b, 8
  %conv4 = ashr exact i16 %sext1, 8
  %shr = ashr i16 %a, 8
  %shr9 = ashr i16 %b, 8
  %add = add nsw i16 %conv4, %conv1
  store i16 %add, i16* %p1, align 4
  %add17 = add nsw i16 %shr9, %shr
  store i16 %add17, i16* %p2, align 4
  ret void
}