reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
    1
    2
    3
    4
    5
    6
    7
    8
    9
   10
   11
   12
   13
   14
   15
   16
   17
   18
   19
   20
   21
   22
   23
   24
   25
   26
   27
   28
   29
   30
   31
   32
   33
   34
   35
   36
   37
   38
   39
   40
   41
   42
   43
   44
   45
   46
   47
   48
   49
   50
   51
   52
   53
   54
   55
   56
   57
   58
   59
   60
   61
   62
   63
   64
   65
   66
   67
   68
   69
   70
   71
   72
   73
   74
   75
   76
   77
   78
   79
   80
   81
   82
   83
   84
   85
   86
   87
   88
   89
   90
   91
   92
; RUN: llc -march=mips64 -mcpu=octeon -target-abi=n64 < %s -o - | FileCheck %s

define i64 @cins_zext(i32 signext %n) {
entry:
  %shl = shl i32 %n, 5
  %conv = zext i32 %shl to i64
  ret i64 %conv

; CHECK-LABEL: cins_zext:
; CHECK:       cins $[[R0:[0-9]+]], $[[R1:[0-9]+]], 5, 26

}

define i64 @cins_and_shl(i64 zeroext %n) {
entry:
  %and = shl i64 %n, 8
  %shl = and i64 %and, 16776960
  ret i64 %shl

; CHECK-LABEL: cins_and_shl:
; CHECK:       cins $[[R0:[0-9]+]], $[[R1:[0-9]+]], 8, 15

}

define i64 @cins_and_shl32(i64 zeroext %n) {
entry:
  %and = shl i64 %n, 38
  %shl = and i64 %and, 18014123631575040
  ret i64 %shl

; CHECK-LABEL: cins_and_shl32:
; CHECK:       cins32 $[[R0:[0-9]+]], $[[R1:[0-9]+]], 6, 15

}

define zeroext i16 @cins_and_shl_16(i16 zeroext %n) {
entry:
  %0 = shl i16 %n, 2
  %1 = and i16 %0, 60
  ret i16 %1

; CHECK-LABEL: cins_and_shl_16:
; CHECK:       cins $[[R0:[0-9]+]], $[[R1:[0-9]+]], 2, 3

}

define zeroext i8 @cins_and_shl_8(i8 zeroext %n) {
entry:
  %0 = shl i8 %n, 2
  %1 = and i8 %0, 12
  ret i8 %1

; CHECK-LABEL: cins_and_shl_8:
; CHECK:       cins $[[R0:[0-9]+]], $[[R1:[0-9]+]], 2, 1

}

define i32 @cins_i32(i32 signext %a) {
entry:
  %and = shl i32 %a, 17
  %shl = and i32 %and, 536739840
  ret i32 %shl

; CHECK-LABEL: cins_i32:
; CHECK:       cins $[[R0:[0-9]+]], $[[R1:[0-9]+]], 17, 11

}

define i64 @cins_shl_and(i32 signext %n) {
entry:
  %and = and i32 %n, 65535
  %conv = zext i32 %and to i64
  %shl = shl nuw nsw i64 %conv, 31
  ret i64 %shl

; CHECK-LABEL: cins_shl_and:
; CHECK:       cins $[[R0:[0-9]+]], $[[R1:[0-9]+]], 31, 15

}


define i64 @cins_shl_and32(i32 signext %n) {
entry:
  %and = and i32 %n, 65535
  %conv = zext i32 %and to i64
  %shl = shl nuw nsw i64 %conv, 47
  ret i64 %shl

; CHECK-LABEL: cins_shl_and32:
; CHECK:       cins32 $[[R0:[0-9]+]], $[[R1:[0-9]+]], 15, 15

}