1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
# This test ensures that the MIR parser parses and prints subregisters index
# operands correctly.
--- |
define zeroext i1 @t(i1 %c) {
entry:
ret i1 %c
}
...
---
name: t
tracksRegLiveness: true
registers:
- { id: 0, class: gr32 }
- { id: 1, class: gr8 }
body: |
bb.0.entry:
liveins: $edi, $eax
; CHECK-LABEL: name: t
; CHECK: liveins: $edi, $eax
; CHECK: [[INSERT_SUBREG:%[0-9]+]]:gr32 = INSERT_SUBREG $edi, $al, %subreg.sub_8bit
; CHECK: [[EXTRACT_SUBREG:%[0-9]+]]:gr8 = EXTRACT_SUBREG $eax, %subreg.sub_8bit_hi
; CHECK: $ax = REG_SEQUENCE [[EXTRACT_SUBREG]], %subreg.sub_8bit, [[EXTRACT_SUBREG]], %subreg.sub_8bit_hi
; CHECK: RETQ $ax
%0 = INSERT_SUBREG $edi, $al, %subreg.sub_8bit
%1 = EXTRACT_SUBREG $eax, %subreg.sub_8bit_hi
$ax = REG_SEQUENCE %1, %subreg.sub_8bit, %1, %subreg.sub_8bit_hi
RETQ $ax
...
|