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| # RUN: llc -verify-machineinstrs -mtriple aarch64--- \
# RUN: -run-pass=instruction-select -mattr=+fullfp16 -global-isel %s -o - \
# RUN: | FileCheck %s
...
---
name: sqrt_float
legalized: true
regBankSelected: true
tracksRegLiveness: true
registers:
- { id: 0, class: fpr }
- { id: 1, class: fpr }
body: |
bb.0:
; CHECK-LABEL: name: sqrt_float
; CHECK: %{{[0-9]+}}:fpr32 = FSQRTSr %{{[0-9]+}}
liveins: $s0
%0:fpr(s32) = COPY $s0
%1:fpr(s32) = G_FSQRT %0
$s0 = COPY %1(s32)
...
---
name: sqrt_double
legalized: true
regBankSelected: true
tracksRegLiveness: true
registers:
- { id: 0, class: fpr }
- { id: 1, class: fpr }
body: |
bb.0:
; CHECK-LABEL: name: sqrt_double
; CHECK: %{{[0-9]+}}:fpr64 = FSQRTDr %{{[0-9]+}}
liveins: $d0
%0:fpr(s64) = COPY $d0
%1:fpr(s64) = G_FSQRT %0
$d0 = COPY %1(s64)
...
---
name: sqrt_v2f32
legalized: true
regBankSelected: true
tracksRegLiveness: true
registers:
- { id: 0, class: fpr }
- { id: 1, class: fpr }
body: |
bb.0:
; CHECK-LABEL: name: sqrt_v2f32
; CHECK: %{{[0-9]+}}:fpr64 = FSQRTv2f32 %{{[0-9]+}}
liveins: $d0
%0:fpr(<2 x s32>) = COPY $d0
%1:fpr(<2 x s32>) = G_FSQRT %0
$d0 = COPY %1(<2 x s32>)
...
---
name: sqrt_v4f32
legalized: true
regBankSelected: true
tracksRegLiveness: true
registers:
- { id: 0, class: fpr }
- { id: 1, class: fpr }
body: |
bb.0:
; CHECK-LABEL: name: sqrt_v4f32
; CHECK: %{{[0-9]+}}:fpr128 = FSQRTv4f32 %{{[0-9]+}}
liveins: $q0
%0:fpr(<4 x s32>) = COPY $q0
%1:fpr(<4 x s32>) = G_FSQRT %0
$q0 = COPY %1(<4 x s32>)
...
---
name: sqrt_v2f64
legalized: true
regBankSelected: true
tracksRegLiveness: true
registers:
- { id: 0, class: fpr }
- { id: 1, class: fpr }
body: |
bb.0:
; CHECK-LABEL: name: sqrt_v2f64
; CHECK: %{{[0-9]+}}:fpr128 = FSQRTv2f64 %{{[0-9]+}}
liveins: $q0
%0:fpr(<2 x s64>) = COPY $q0
%1:fpr(<2 x s64>) = G_FSQRT %0
$q0 = COPY %1(<2 x s64>)
...
---
name: sqrt_v4f16
legalized: true
regBankSelected: true
tracksRegLiveness: true
registers:
- { id: 0, class: fpr }
- { id: 1, class: fpr }
body: |
bb.0:
; CHECK-LABEL: name: sqrt_v4f16
; CHECK: %{{[0-9]+}}:fpr64 = FSQRTv4f16 %{{[0-9]+}}
liveins: $d0
%0:fpr(<4 x s16>) = COPY $d0
%1:fpr(<4 x s16>) = G_FSQRT %0
$d0 = COPY %1(<4 x s16>)
...
---
name: sqrt_v8f16
legalized: true
regBankSelected: true
tracksRegLiveness: true
registers:
- { id: 0, class: fpr }
- { id: 1, class: fpr }
body: |
bb.0:
; CHECK-LABEL: name: sqrt_v8f16
; CHECK: %{{[0-9]+}}:fpr128 = FSQRTv8f16 %{{[0-9]+}}
liveins: $q0
%0:fpr(<8 x s16>) = COPY $q0
%1:fpr(<8 x s16>) = G_FSQRT %0
$q0 = COPY %1(<8 x s16>)
...
|