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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
lib/Target/XCore/XCoreISelLowering.cpp 1606 TargetLowering::TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(),
1608 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
1622 TargetLowering::TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(),
1624 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
1643 return DAG.getNode(XCoreISD::LADD, dl, DAG.getVTList(VT, VT), N1, N0, N2);
1643 return DAG.getNode(XCoreISD::LADD, dl, DAG.getVTList(VT, VT), N1, N0, N2);
1647 SDValue Carry = DAG.getConstant(0, dl, VT);
1648 SDValue Result = DAG.getNode(ISD::AND, dl, VT, N2,
1649 DAG.getConstant(1, dl, VT));
1651 return DAG.getMergeValues(Ops, dl);
1659 KnownBits Known = DAG.computeKnownBits(N2);
1661 SDValue Carry = DAG.getConstant(0, dl, VT);
1662 SDValue Result = DAG.getNode(ISD::ADD, dl, VT, N0, N2);
1664 return DAG.getMergeValues(Ops, dl);
1681 KnownBits Known = DAG.computeKnownBits(N2);
1684 SDValue Result = DAG.getNode(ISD::SUB, dl, VT,
1685 DAG.getConstant(0, dl, VT), N2);
1687 return DAG.getMergeValues(Ops, dl);
1696 KnownBits Known = DAG.computeKnownBits(N2);
1698 SDValue Borrow = DAG.getConstant(0, dl, VT);
1699 SDValue Result = DAG.getNode(ISD::SUB, dl, VT, N0, N2);
1701 return DAG.getMergeValues(Ops, dl);
1718 return DAG.getNode(XCoreISD::LMUL, dl, DAG.getVTList(VT, VT),
1718 return DAG.getNode(XCoreISD::LMUL, dl, DAG.getVTList(VT, VT),
1725 SDValue Lo = DAG.getNode(ISD::ADD, dl, VT, N2, N3);
1727 return DAG.getMergeValues(Ops, dl);
1731 DAG.getNode(XCoreISD::LADD, dl, DAG.getVTList(VT, VT), N2, N3, N1);
1731 DAG.getNode(XCoreISD::LADD, dl, DAG.getVTList(VT, VT), N2, N3, N1);
1734 return DAG.getMergeValues(Ops, dl);
1746 SDValue Ignored = DAG.getNode(XCoreISD::LMUL, dl,
1747 DAG.getVTList(MVT::i32, MVT::i32), Mul0,
1759 DAG.MaskedValueIsZero(Mul0, HighMask) &&
1760 DAG.MaskedValueIsZero(Mul1, HighMask) &&
1761 DAG.MaskedValueIsZero(Addend0, HighMask) &&
1762 DAG.MaskedValueIsZero(Addend1, HighMask)) {
1763 SDValue Mul0L = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32,
1764 Mul0, DAG.getConstant(0, dl, MVT::i32));
1765 SDValue Mul1L = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32,
1766 Mul1, DAG.getConstant(0, dl, MVT::i32));
1767 SDValue Addend0L = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32,
1768 Addend0, DAG.getConstant(0, dl, MVT::i32));
1769 SDValue Addend1L = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32,
1770 Addend1, DAG.getConstant(0, dl, MVT::i32));
1771 SDValue Hi = DAG.getNode(XCoreISD::LMUL, dl,
1772 DAG.getVTList(MVT::i32, MVT::i32), Mul0L, Mul1L,
1775 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, Hi);
1783 allowsMemoryAccessForAlignment(*DAG.getContext(), DAG.getDataLayout(),
1783 allowsMemoryAccessForAlignment(*DAG.getContext(), DAG.getDataLayout(),
1801 bool isTail = isInTailCallPosition(DAG, ST, Chain);
1802 return DAG.getMemmove(Chain, dl, ST->getBasePtr(),
1804 DAG.getConstant(StoreBits/8, dl, MVT::i32),