reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/X86/X86GenDAGISel.inc
35294 /* 73455*/  /*SwitchOpcode*/ 47|128,24/*3119*/, TARGET_VAL(X86ISD::VZEXT_MOVL),// ->76578
206700 /*418628*/          OPC_CheckOpcode, TARGET_VAL(X86ISD::VZEXT_MOVL),
206743 /*418742*/          OPC_CheckOpcode, TARGET_VAL(X86ISD::VZEXT_MOVL),
229143 /*467638*/          OPC_CheckOpcode, TARGET_VAL(X86ISD::VZEXT_MOVL),
229225 /*467821*/          OPC_CheckOpcode, TARGET_VAL(X86ISD::VZEXT_MOVL),
229296 /*467987*/            OPC_CheckOpcode, TARGET_VAL(X86ISD::VZEXT_MOVL),
229351 /*468107*/              OPC_CheckOpcode, TARGET_VAL(X86ISD::VZEXT_MOVL),
229413 /*468255*/              OPC_CheckOpcode, TARGET_VAL(X86ISD::VZEXT_MOVL),
gen/lib/Target/X86/X86GenFastISel.inc
 5981   case X86ISD::VZEXT_MOVL: return fastEmit_X86ISD_VZEXT_MOVL_r(VT, RetVT, Op0, Op0IsKill);
lib/Target/X86/X86ISelLowering.cpp
 4554   case X86ISD::VZEXT_MOVL:
 6184   if (Op.getOpcode() == X86ISD::VZEXT_MOVL &&
 6545   case X86ISD::VZEXT_MOVL:
12214     V = DAG.getNode(X86ISD::VZEXT_MOVL, DL, MVT::v2i64, V);
12332   V2 = DAG.getNode(X86ISD::VZEXT_MOVL, DL, ExtVT, V2);
28642   case X86ISD::VZEXT_MOVL:         return "X86ISD::VZEXT_MOVL";
31825     Shuffle = X86ISD::VZEXT_MOVL;
31872     Shuffle = X86ISD::VZEXT_MOVL;
34193   if (N->getOpcode() == X86ISD::VZEXT_MOVL &&
34220   if (N->getOpcode() == X86ISD::VZEXT_MOVL && !DCI.isBeforeLegalizeOps() &&
34226     SDValue Movl = DAG.getNode(X86ISD::VZEXT_MOVL, dl, In.getValueType(), In);
34234   if (N->getOpcode() == X86ISD::VZEXT_MOVL && N->getOperand(0).hasOneUse() &&
34552     case X86ISD::VZEXT_MOVL: {
45009   case X86ISD::VZEXT_MOVL: