reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/X86/X86GenDAGISel.inc
111798 /*231852*/              /*SwitchOpcode*/ 62, TARGET_VAL(X86ISD::VZEXT_LOAD),// ->231917
111970 /*232188*/              /*SwitchOpcode*/ 62, TARGET_VAL(X86ISD::VZEXT_LOAD),// ->232253
112142 /*232524*/              /*SwitchOpcode*/ 62, TARGET_VAL(X86ISD::VZEXT_LOAD),// ->232589
112314 /*232860*/              /*SwitchOpcode*/ 62, TARGET_VAL(X86ISD::VZEXT_LOAD),// ->232925
178821 /*362305*/              /*SwitchOpcode*/ 62, TARGET_VAL(X86ISD::VZEXT_LOAD),// ->362370
178932 /*362520*/              /*SwitchOpcode*/ 62, TARGET_VAL(X86ISD::VZEXT_LOAD),// ->362585
189674 /*383082*/        /*SwitchOpcode*/ 37|128,3/*421*/, TARGET_VAL(X86ISD::VZEXT_LOAD),// ->383507
189875 /*383508*/      /*SwitchOpcode*/ 72, TARGET_VAL(X86ISD::VZEXT_LOAD),// ->383583
190733 /*385192*/        /*SwitchOpcode*/ 37|128,3/*421*/, TARGET_VAL(X86ISD::VZEXT_LOAD),// ->385617
190934 /*385618*/      /*SwitchOpcode*/ 72, TARGET_VAL(X86ISD::VZEXT_LOAD),// ->385693
191301 /*386324*/        /*SwitchOpcode*/ 31, TARGET_VAL(X86ISD::VZEXT_LOAD),// ->386358
191797 /*387329*/        /*SwitchOpcode*/ 31, TARGET_VAL(X86ISD::VZEXT_LOAD),// ->387363
192183 /*388126*/        /*SwitchOpcode*/ 31, TARGET_VAL(X86ISD::VZEXT_LOAD),// ->388160
192727 /*389257*/        /*SwitchOpcode*/ 31, TARGET_VAL(X86ISD::VZEXT_LOAD),// ->389291
199471 /*403426*/      /*SwitchOpcode*/ 109, TARGET_VAL(X86ISD::VZEXT_LOAD),// ->403538
200126 /*404861*/      /*SwitchOpcode*/ 48, TARGET_VAL(X86ISD::VZEXT_LOAD),// ->404912
211620 /*429137*/      /*SwitchOpcode*/ 68, TARGET_VAL(X86ISD::VZEXT_LOAD),// ->429208
227000 /*462839*/  /*SwitchOpcode*/ 97|128,5/*737*/, TARGET_VAL(X86ISD::VZEXT_LOAD),// ->463580
243008 /*496142*/      /*SwitchOpcode*/ 47, TARGET_VAL(X86ISD::VZEXT_LOAD),// ->496192
243124 /*496374*/        OPC_SwitchOpcode /*2 cases */, 25, TARGET_VAL(X86ISD::VZEXT_LOAD),// ->496403
245056 /*500571*/        /*SwitchOpcode*/ 70, TARGET_VAL(X86ISD::VZEXT_LOAD),// ->500644
245278 /*501008*/        /*SwitchOpcode*/ 52, TARGET_VAL(X86ISD::VZEXT_LOAD),// ->501063
245435 /*501313*/        /*SwitchOpcode*/ 31, TARGET_VAL(X86ISD::VZEXT_LOAD),// ->501347
245620 /*501694*/      /*SwitchOpcode*/ 39, TARGET_VAL(X86ISD::VZEXT_LOAD),// ->501736
246724 /*503949*/      /*SwitchOpcode*/ 46, TARGET_VAL(X86ISD::VZEXT_LOAD),// ->503998
249605 /*510101*/      /*SwitchOpcode*/ 25, TARGET_VAL(X86ISD::VZEXT_LOAD),// ->510129
lib/Target/X86/X86ISelDAGToDAG.cpp
 2332   if (N.getOpcode() == X86ISD::VZEXT_LOAD) {
lib/Target/X86/X86ISelLowering.cpp
 7986           DAG.getMemIntrinsicNode(X86ISD::VZEXT_LOAD, DL, Tys, Ops, VecSVT,
28373         SDValue Ld = DAG.getMemIntrinsicNode(X86ISD::VZEXT_LOAD, dl, Tys, Ops,
28540     SDValue Res = DAG.getMemIntrinsicNode(X86ISD::VZEXT_LOAD, dl, Tys, Ops,
28643   case X86ISD::VZEXT_LOAD:         return "X86ISD::VZEXT_LOAD";
32422     if (V1.getOpcode() == X86ISD::VZEXT_LOAD &&
34241           DAG.getMemIntrinsicNode(X86ISD::VZEXT_LOAD, dl, Tys, Ops,
42004           DAG.getMemIntrinsicNode(X86ISD::VZEXT_LOAD, dl, Tys, Ops, MemVT,
42039           DAG.getMemIntrinsicNode(X86ISD::VZEXT_LOAD, dl, Tys, Ops, MemVT,