reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/Target/X86/X86ISelLowering.cpp
25702   if (!(VT == MVT::v8i16 || VT == MVT::v4i32 ||
25702   if (!(VT == MVT::v8i16 || VT == MVT::v4i32 ||
25703         (Subtarget.hasInt256() && VT == MVT::v16i16) ||
25704         (!Subtarget.hasAVX512() && VT == MVT::v16i8)))
25709     MVT SVT = VT.getVectorElementType();
25712     unsigned NumElems = VT.getVectorNumElements();
25730     return DAG.getBuildVector(VT, dl, Elts);
25735   if (VT == MVT::v4i32) {
25736     Amt = DAG.getNode(ISD::SHL, dl, VT, Amt, DAG.getConstant(23, dl, VT));
25736     Amt = DAG.getNode(ISD::SHL, dl, VT, Amt, DAG.getConstant(23, dl, VT));
25737     Amt = DAG.getNode(ISD::ADD, dl, VT, Amt,
25738                       DAG.getConstant(0x3f800000U, dl, VT));
25740     return DAG.getNode(ISD::FP_TO_SINT, dl, VT, Amt);
25744   if (VT == MVT::v8i16 && !Subtarget.hasAVX2()) {
25745     SDValue Z = DAG.getConstant(0, dl, VT);
25746     SDValue Lo = DAG.getBitcast(MVT::v4i32, getUnpackl(DAG, dl, VT, Amt, Z));
25747     SDValue Hi = DAG.getBitcast(MVT::v4i32, getUnpackh(DAG, dl, VT, Amt, Z));
25751       return DAG.getNode(X86ISD::PACKUS, dl, VT, Lo, Hi);
25753     return DAG.getVectorShuffle(VT, dl, DAG.getBitcast(VT, Lo),
25753     return DAG.getVectorShuffle(VT, dl, DAG.getBitcast(VT, Lo),
25754                                         DAG.getBitcast(VT, Hi),