reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
25168 unsigned NumElts = VT.getVectorNumElements(); 25173 if (VT.is256BitVector() && !Subtarget.hasInt256()) 25176 if (VT == MVT::v4i32 || VT == MVT::v8i32 || VT == MVT::v16i32) { 25176 if (VT == MVT::v4i32 || VT == MVT::v8i32 || VT == MVT::v16i32) { 25176 if (VT == MVT::v4i32 || VT == MVT::v8i32 || VT == MVT::v16i32) { 25177 assert((VT == MVT::v4i32 && Subtarget.hasSSE2()) || 25178 (VT == MVT::v8i32 && Subtarget.hasInt256()) || 25179 (VT == MVT::v16i32 && Subtarget.hasAVX512())); 25196 SDValue Odd0 = DAG.getVectorShuffle(VT, dl, A, A, 25199 SDValue Odd1 = DAG.getVectorShuffle(VT, dl, B, B, 25209 SDValue Mul1 = DAG.getBitcast(VT, DAG.getNode(Opcode, dl, MulVT, 25214 SDValue Mul2 = DAG.getBitcast(VT, DAG.getNode(Opcode, dl, MulVT, 25223 SDValue Res = DAG.getVectorShuffle(VT, dl, Mul1, Mul2, ShufMask); 25228 SDValue Zero = DAG.getConstant(0, dl, VT); 25229 SDValue T1 = DAG.getNode(ISD::AND, dl, VT, 25230 DAG.getSetCC(dl, VT, Zero, A, ISD::SETGT), B); 25231 SDValue T2 = DAG.getNode(ISD::AND, dl, VT, 25232 DAG.getSetCC(dl, VT, Zero, B, ISD::SETGT), A); 25234 SDValue Fixup = DAG.getNode(ISD::ADD, dl, VT, T1, T2); 25235 Res = DAG.getNode(ISD::SUB, dl, VT, Res, Fixup); 25242 assert((VT == MVT::v16i8 || (VT == MVT::v32i8 && Subtarget.hasInt256()) || 25242 assert((VT == MVT::v16i8 || (VT == MVT::v32i8 && Subtarget.hasInt256()) || 25243 (VT == MVT::v64i8 && Subtarget.hasBWI())) && 25253 if ((VT == MVT::v16i8 && Subtarget.hasInt256()) || 25254 (VT == MVT::v32i8 && Subtarget.canExtendTo512BW())) { 25260 return DAG.getNode(ISD::TRUNCATE, dl, VT, Mul); 25265 if (VT == MVT::v64i8 && IsSigned) 25269 if (VT == MVT::v32i8 && IsSigned) { 25286 Lo = DAG.getBitcast(VT, Lo); 25287 Hi = DAG.getBitcast(VT, Hi); 25288 return DAG.getVectorShuffle(VT, dl, Lo, Hi, 25312 if (IsSigned && VT == MVT::v16i8 && Subtarget.hasSSE41()) { 25315 AHi = DAG.getVectorShuffle(VT, dl, A, A, PSHUFDMask); 25318 ALo = DAG.getBitcast(ExVT, getUnpackl(DAG, dl, VT, DAG.getUNDEF(VT), A)); 25318 ALo = DAG.getBitcast(ExVT, getUnpackl(DAG, dl, VT, DAG.getUNDEF(VT), A)); 25319 AHi = DAG.getBitcast(ExVT, getUnpackh(DAG, dl, VT, DAG.getUNDEF(VT), A)); 25319 AHi = DAG.getBitcast(ExVT, getUnpackh(DAG, dl, VT, DAG.getUNDEF(VT), A)); 25324 ALo = DAG.getBitcast(ExVT, getUnpackl(DAG, dl, VT, A, 25325 DAG.getConstant(0, dl, VT))); 25326 AHi = DAG.getBitcast(ExVT, getUnpackh(DAG, dl, VT, A, 25327 DAG.getConstant(0, dl, VT))); 25354 } else if (IsSigned && VT == MVT::v16i8 && Subtarget.hasSSE41()) { 25357 BHi = DAG.getVectorShuffle(VT, dl, B, B, PSHUFDMask); 25360 BLo = DAG.getBitcast(ExVT, getUnpackl(DAG, dl, VT, DAG.getUNDEF(VT), B)); 25360 BLo = DAG.getBitcast(ExVT, getUnpackl(DAG, dl, VT, DAG.getUNDEF(VT), B)); 25361 BHi = DAG.getBitcast(ExVT, getUnpackh(DAG, dl, VT, DAG.getUNDEF(VT), B)); 25361 BHi = DAG.getBitcast(ExVT, getUnpackh(DAG, dl, VT, DAG.getUNDEF(VT), B)); 25366 BLo = DAG.getBitcast(ExVT, getUnpackl(DAG, dl, VT, B, 25367 DAG.getConstant(0, dl, VT))); 25368 BHi = DAG.getBitcast(ExVT, getUnpackh(DAG, dl, VT, B, 25369 DAG.getConstant(0, dl, VT))); 25380 return DAG.getNode(X86ISD::PACKUS, dl, VT, RLo, RHi);