reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
9587 MVT EltVT = VT.getVectorElementType(); 9591 if (VT.getVectorElementType() == MVT::i1 && Subtarget.hasAVX512()) 9635 return DAG.getUNDEF(VT); 9644 (isOperationLegalOrCustom(ISD::INSERT_VECTOR_ELT, VT) || 9645 isOperationLegalOrCustom(ISD::VECTOR_SHUFFLE, VT))) { 9668 SDValue DAGConstVec = DAG.getConstantPool(CV, VT); 9679 SDValue Ld = DAG.getLoad(VT, dl, DAG.getEntryNode(), LegalDAGConstVec, MPI); 9681 unsigned NumEltsInLow128Bits = 128 / VT.getScalarSizeInBits(); 9683 return DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, Ld, VarElt, InsIndex); 9687 assert(VT.getSizeInBits() > 128 && "Invalid insertion index?"); 9690 unsigned NumElts = VT.getVectorNumElements(); 9693 SDValue S2V = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, VarElt); 9694 return DAG.getVectorShuffle(VT, dl, Ld, S2V, ShuffleMask); 9708 return DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Item); 9712 assert((VT.is128BitVector() || VT.is256BitVector() || 9712 assert((VT.is128BitVector() || VT.is256BitVector() || 9713 VT.is512BitVector()) && 9715 Item = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Item); 9724 MVT ShufVT = MVT::getVectorVT(MVT::i32, VT.getSizeInBits()/32); 9727 return DAG.getBitcast(VT, Item); 9735 unsigned NumBits = VT.getSizeInBits(); 9736 return getVShift(true, VT, 9738 VT, Op.getOperand(1)), 9751 Item = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Item); 9766 return LowerAsSplatVectorLoad(Item, VT, dl, DAG); 9783 EltsFromConsecutiveLoads(VT, Ops, dl, DAG, Subtarget, false)) 9801 MVT WideEltVT = VT.isFloatingPoint() ? MVT::f64 : MVT::i64; 9808 return DAG.getBitcast(VT, DAG.getNode(X86ISD::VBROADCAST, dl, BcastVT, 9815 if (VT.getSizeInBits() > 128) { 9833 SDValue V2 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, 9862 Ops[i] = getZeroVector(VT, Subtarget, DAG, dl); 9864 Ops[i] = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Op.getOperand(i)); 9874 Ops[i] = getMOVL(DAG, dl, VT, Ops[i*2+1], Ops[i*2]); 9877 Ops[i] = getMOVL(DAG, dl, VT, Ops[i*2], Ops[i*2+1]); 9880 Ops[i] = getUnpackl(DAG, dl, VT, Ops[i*2], Ops[i*2+1]); 9893 return DAG.getVectorShuffle(VT, dl, Ops[0], Ops[1], MaskVec); 9906 Result = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Op.getOperand(0)); 9908 Result = DAG.getUNDEF(VT); 9912 Result = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, Result, 9924 Ops[i] = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Op.getOperand(i)); 9926 Ops[i] = DAG.getUNDEF(VT); 9943 Ops[i] = DAG.getVectorShuffle(VT, dl, Ops[2*i], Ops[(2*i)+1], Mask);